Abdellatif El Khlifi authored 1 year ago and Tom Rini committed 1 year ago

provide a test case

Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>

As the RISC-V ACLINT specification is defined to be backward compatible
with the SiFive CLINT specification, we rename SiFive CLINT to RISC-V
ALINT in the source tree to be future-proof.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Rick Chen <rick@andestech.com>

Eugen Hristev authored 1 year ago and Tom Rini committed 1 year ago

This was not done when the tree name was changed, fix it now.

Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>

This patch adds the PCIe controller driver for the Xilinx / AMD ZynqMP
NWL PCIe Bridge as root port. The driver source is partly copied from
the Linux PCI driver and modified to enable usage in U-Boot (e.g.
simplified and interrupt support removed).

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Pali Rohár <pali@kernel.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com>
Acked-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Pali Rohár <pali@kernel.org>
Link: https://lore.kernel.org/r/20230525094918.111949-1-sr@denx.de


Signed-off-by: Michal Simek <michal.simek@amd.com>

The Xilinx ZynqMP SoC has a hardened display pipeline named DisplayPort
Subsystem. It includes a buffer manager, blender, an audio mixer and a
DisplayPort source controller (transmitter). The DisplayPort controller can
source data from memory (non-live input) or the stream (live input). The
DisplayPort controller is responsible for managing the link and physical
layer functionality. The controller packs audio/video data into transfer
units and sends them over the main link. The link rate and lane counts can
be selected based on the application bandwidth requirements. The
DisplayPort pipeline consists of the DisplayPort direct memory access (DMA)
for fetching data from memory. The DisplayPort DMA controller (DPDMA)
supports up to six input channels as non-live input.

This driver supports the DisplayPort Subsystem and implements
1)640x480 resolution
2)RGBA8888 32bpp format
3)DPDMA channel 3 for Graphics
4)Non-live input
5)Fixed 5.4G link rate
6)Tested on ZCU102 board

There will be additional work to configure GT lines based on DT, higher
resolutions, support for more compressed video formats, spliting code to
more files, add support for EDID, audio support, using clock framework for
all clocks and in general code clean up.

Codevelop-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/5c1567b63d0280dacc7efba2998857c399c25358.1684312924.git.michal.simek@amd.com

Manorit Chawdhry authored 1 year ago and Tom Rini committed 1 year ago

K3 devices have runtime type board detection. Make the default defconfig
include the secure configuration. Then remove the HS specific config.

Non-HS devices will continue to boot due to runtime device type detection.
If TI_SECURE_DEV_PKG is not set the build will emit warnings, for non-HS
devices these can be ignored.

Reviewed-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Acked-by: Andrew Davis <afd@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>

Dmitrii Merkurev authored 1 year ago and Tom Rini committed 1 year ago

Known limitations are
1. fastboot reboot doesn't work (answering OK but not rebooting)
2. flashing isn't supported (TCP transport only limitation)

The command syntax is
fastboot tcp

Signed-off-by: Dmitrii Merkurev <dimorinny@google.com>
Cc: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Simon Glass <sjg@chromium.org>
Сс: Joe Hershberger <joe.hershberger@ni.com>
Сс: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Manorit Chawdhry authored 1 year ago and Tom Rini committed 1 year ago

K3 devices have runtime type board detection. Make the default defconfig
include the secure configuration. Then remove the HS specific config.

Non-HS devices will continue to boot due to runtime device type detection.
If TI_SECURE_DEV_PKG is not set the build will emit warnings, for non-HS
devices these can be ignored.

Reviewed-by: Kamlesh Gurudasani <kamlesh@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>

Manorit Chawdhry authored 1 year ago and Tom Rini committed 1 year ago

K3 devices have runtime type board detection. Make the default defconfig
include the secure configuration. Then remove the HS specific config.

Non-HS devices will continue to boot due to runtime device type detection.
If TI_SECURE_DEV_PKG is not set the build will emit warnings, for non-HS
devices these can be ignored.

Reviewed-by: Kamlesh Gurudasani <kamlesh@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>

Yang Xiwen authored 1 year ago and Tom Rini committed 1 year ago

First supported chip is hi3798mv200 (which is similar to Hi3798cv200
used by poplar).

Signed-off-by: Yang Xiwen <forbidden405@outlook.com>

Heinrich Schuchardt authored 1 year ago and Ilias Apalodimas committed 1 year ago

The files include/tpm* are an integral part of the TPM drivers.
The tpm* commands are used to access TPM devices.

Both should be managed by the TPM DRIVERS maintainer.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>

Heinrich Schuchardt authored 1 year ago and Simon Glass committed 1 year ago

os.h is only used by the sandbox.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Abdellatif El Khlifi authored 1 year ago and Tom Rini committed 1 year ago

provide a test for NVM XIP devices

The test case allows to make sure of the following:

- The NVM XIP QSPI devices are probed
- The DT entries are read correctly
- the data read from the flash by the NVMXIP block driver is correct

Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>

Abdellatif El Khlifi authored 1 year ago and Tom Rini committed 1 year ago

add nvmxip_qspi driver under UCLASS_NVMXIP

The device associated with this driver is the parent of the blk#<id> device
nvmxip_qspi can be reused by other platforms. If the platform
has custom settings to apply before using the flash, then the platform
can provide its own parent driver belonging to UCLASS_NVMXIP and reuse
nvmxip-blk driver. The custom driver can be implemented like nvmxip_qspi in
addition to the platform custom settings.

Platforms can use multiple NVM XIP devices at the same time by defining a
DT node for each one of them.

For more details please refer to doc/develop/driver-model/nvmxip_qspi.rst

Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>

Abdellatif El Khlifi authored 1 year ago and Tom Rini committed 1 year ago

add block storage emulation for NVM XIP flash devices

Some paltforms such as Corstone-1000 need to see NVM XIP raw flash
as a block storage device with read only capability.

Here NVM flash devices are devices with addressable
memory (e.g: QSPI NOR flash).

The implementation is generic and can be used by different platforms.

Two drivers are provided as follows.

  nvmxip-blk :

    a generic block driver allowing to read from the XIP flash

  nvmxip Uclass driver :

        When a device is described in the DT and associated with
        UCLASS_NVMXIP, the Uclass creates a block device and binds it with
	 the nvmxip-blk.

Platforms can use multiple NVM XIP devices at the same time by defining a
DT node for each one of them.

Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>

Frieder Schrempf authored 2 years ago and Dario Binacchi committed 1 year ago

As there are other types of NAND flashes like SPI NAND, let's be
more specific.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Link: https://lore.kernel.org/all/20230213094626.50957-2-frieder@fris.de/


Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>

Frieder Schrempf authored 2 years ago and Dario Binacchi committed 1 year ago

In [1] Michael agreed on taking patches for SPI NAND through the RAW
NAND tree. Add a dedicated entry to the MAINTAINERS file which adds
Michael and Dario as maintainers and myself as reviewer.

[1] https://lists.denx.de/pipermail/u-boot/2023-February/508571.html



Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Cc: Michael Nazzareno Trimarchi <michael@amarulasolutions.com>
Cc: Tom Rini <trini@konsulko.com>
Link: https://lore.kernel.org/all/20230213094626.50957-1-frieder@fris.de/


Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>

Tobias Waldekranz authored 2 years ago and Tom Rini committed 1 year ago

Explain block maps by going through two common use-cases.

Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Tobias Waldekranz authored 2 years ago and Tom Rini committed 1 year ago

Verify that:

- Block maps can be created and destroyed
- Mappings aren't allowed to overlap
- Multiple mappings can be attached and be read/written from/to

Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Tobias Waldekranz authored 2 years ago and Tom Rini committed 1 year ago

Add a frontend for the blkmap subsystem. In addition to the common
block device operations, this allows users to create and destroy
devices, and map in memory and slices of other block devices.

With that we support two primary use-cases:

- Being able to "distro boot" from a RAM disk. I.e., from an image
  where the kernel is stored in /boot of some filesystem supported
  by U-Boot.

- Accessing filesystems not located on exact partition boundaries,
  e.g. when a filesystem image is wrapped in an FIT image and stored
  in a disk partition.

Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Tobias Waldekranz authored 2 years ago and Tom Rini committed 1 year ago

blkmaps are loosely modeled on Linux's device mapper subsystem. The
basic idea is that you can create virtual block devices whose blocks
can be backed by a plethora of sources that are user configurable.

This change just adds the basic infrastructure for creating and
removing blkmap devices. Subsequent changes will extend this to add
support for actual mappings.

Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Stephen Carlson authored 2 years ago and Tom Rini committed 1 year ago

Adds a test for the new pci_mps command to ensure that it can set the
Maximum Payload Size (MPS) of all devices to 256 bytes in the sandbox
environment. Enables the pci_mps command in the sandbox environment so
that this test can be run.

Signed-off-by: Stephen Carlson <stcarlso@linux.microsoft.com>

This reverts commit c714045c.

Signed-off-by: Tom Rini <trini@konsulko.com>

This reverts commit e352e106.

Signed-off-by: Tom Rini <trini@konsulko.com>

Manorit Chawdhry authored 2 years ago and Tom Rini committed 2 years ago

K3 devices have runtime type board detection. Make the default defconfig
include the secure configuration. Then remove the HS specific config.

Non-HS devices will continue to boot due to runtime device type detection.
If TI_SECURE_DEV_PKG is not set the build will emit warnings, for non-HS
devices these can be ignored.

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Acked-by: Andrew Davis <afd@ti.com>

Manorit Chawdhry authored 2 years ago and Tom Rini committed 2 years ago

K3 devices have runtime type board detection. Make the default defconfig
include the secure configuration. Then remove the HS specific config.

Non-HS devices will continue to boot due to runtime device type detection.
If TI_SECURE_DEV_PKG is not set the build will emit warnings, for non-HS
devices these can be ignored.

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Acked-by: Andrew Davis <afd@ti.com>

Heinrich Schuchardt authored 2 years ago and Simon Glass committed 2 years ago

Drivers should have a maintainer.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Yu Chien Peter Lin authored 2 years ago and Heinrich Schuchardt committed 2 years ago

This patch adds a brief introduction to the RISC-V architecture and
the typical boot process used on a variety of RISC-V platforms.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>

Ryan Chen authored 2 years ago and Heiko Schocher committed 2 years ago

Add i2c new register mode driver to support AST2600 i2c
new register mode. AST2600 i2c controller have legacy and
new register mode. The new register mode have global register
support 4 base clock for scl clock selection, and new clock
divider mode.

Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>

Linus Walleij authored 2 years ago and Tom Rini committed 2 years ago

Add a command to load SEAMA (Seattle Image), a NAND flash
on-flash storage format.

This type of flash image is found in some D-Link routers such
as DIR-645, DIR-842, DIR-859, DIR-860L, DIR-885L, DIR890L and
DCH-M225, as well as in WD and NEC routers on the ath79
(MIPS), Broadcom BCM53xx, and RAMIPS platforms.

This U-Boot command will read and decode a SEAMA image from
raw NAND flash on any platform. As it is always using big endian
format for the data decoding is always necessary on platforms
such as ARM.

The command is needed to read a SEAMA-encoded boot image on the
D-Link DIR-890L router for boot from NAND flash in an upcoming
port of U-Boot to the Broadcom Northstar (BCM4709, BCM53xx)
architecture.

A basic test and documentation is added as well. The test must
be run on a target with NAND flash support and at least one
resident SEAMA image in flash.

Cc: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Angelo Dureghello authored 2 years ago and Tom Rini committed 2 years ago

Set my new current personal email.

Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>

Nikhil M Jain authored 2 years ago and Anatolij Gustschin committed 2 years ago

Added tidss video driver support which enables display
on oldi panel using AM62x, it creates a simple pipeline
framebuffer==>vidl1==>ovr1==>vp1==>oldi_panel and
calculates clock rates for panel from panel node in
device tree.

To compile TIDSS when user sets CONFIG_VIDEO_TIDSS
add rule in Makefile. Include tidss folder location
in Kconfig.

TIDSS is ported from linux kernel version 5.10.145

Signed-off-by: Nikhil M Jain <n-jain1@ti.com>

Mark Kettenis authored 2 years ago and Tom Rini committed 2 years ago

This driver supports the PCIe controller on the Apple M1 and
M2 SoCs.  The code is adapted from the Linux driver.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>

John Keeping authored 2 years ago and Tom Rini committed 2 years ago

Add the related include files to the power MAINTAINERS entry.

Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Since I do have a look on TEE patches regardless and Jens doesn't have
his own tree, add myself as a co-maintainer.  I'll be carrying over the
TEE related patches from now on.  While at it add the maintenance tree
for TPM

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>

Sean Anderson authored 2 years ago and Tom Rini committed 2 years ago

This adds an NVMEM reboot mode driver, similar to Linux's
implementation. This allows using the same device tree binding for Linux
and U-Boot in most cases.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Alexey Romanov authored 2 years ago and Neil Armstrong committed 2 years ago

It is incorrect to keep commands in the arch/ folder.

Signed-off-by: Alexey Romanov <avromanov@sberdevices.ru>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230110105650.54580-3-avromanov@sberdevices.ru


[narmstrong: moved after cmd/sound in index.rst]
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

Stefan Bosch authored 2 years ago and Tom Rini committed 2 years ago

Add dm_serial driver source code for S5P4418 SOC. Extend the "arm,pl011"
driver by init of UART-clock and UART-reset.

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>

The EBI is used to access peripherals like NAND, SRAM, NOR etc. Add
this driver to probe the nand flash controller. This is a dummy driver
and not yet a complete device driver for EBI.

Signed-off-by: Balamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com>

Gabriel Fernandez authored 2 years ago and Patrice Chotard committed 2 years ago

Add support of stm32mp13 DT bindings of clock and reset.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>