- Jan 20, 2020
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Enable SPL SDP fallback boot option in default build. Signed-off-by:Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Silvio Fricke <silvio.fricke@softing.com> Cc: Stefano Babic <sbabic@denx.de>
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The PFUZE100 and PFUZE200 PMICs can be discerned by bit 0 in DeviceID register. Print the correct identification of the PMICs. Signed-off-by: -
Simplify the uSDHC4 eMMC controller setup. This is the only eMMC present on the system and only controller that is used, so drop the extra logic. Signed-off-by:
Stefano Babic <sbabic@denx.de>
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- Jan 17, 2020
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Tom Rini authored
- Add support and tests for AES192 and AES256
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This commit add to u-boot the support to decrypt fit image encrypted with aes. The FIT image contains the key name and the IV name. Then u-boot look for the key and IV in his device tree and decrypt images before moving to the next stage. Signed-off-by:Philippe Reynes <philippe.reynes@softathome.com>
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This commit add the support of encrypting image with aes in mkimage. To enable the ciphering, a node cipher with a reference to a key and IV (Initialization Vector) must be added to the its file. Then mkimage add the encrypted image to the FIT and add the key and IV to the u-boot device tree. Signed-off-by: -
This commit add test unit for aes196 and aes256. Signed-off-by:
Simon Glass <sjg@chromium.org>
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This commit add test unit for aes128. Signed-off-by:
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Until now, we only support aes128. This commit add the support of aes192 and aes256. Signed-off-by:
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In the code, we use the size of the key for the size of the block. It's true when the key is 128 bits, but it become false for key of 192 bits and 256 bits. So to prepare the support of aes192 and 256, we introduce a constant for the iaes block size. Signed-off-by:
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- Jan 16, 2020
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SoC base addresses should better go into a common SoC file instead of repeating the definition in each board file. Signed-off-by:
Fabio Estevam <festevam@gmail.com> Reviewed-by:
Peng Fan <peng.fan@nxp.com>
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As we use the driver model for ESDHC there is no need for defining CONFIG_SYS_FSL_USDHC_NUM and CONFIG_SYS_FSL_ESDHC_ADDR, so simply remove them. Signed-off-by:
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Currently the following build warning is seen: ===================== WARNING ====================== This board does not use CONFIG_DM_ETH (Driver Model for Ethernet drivers). Please update the board to use CONFIG_DM_ETH before the v2020.07 release. Failure to update by the deadline may result in board removal. See doc/driver-model/migration.rst for more info. =================================================== Since the mx7ulp-evk board does not have networking support, explicitly disable networking. Signed-off-by:
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https://gitlab.denx.de/u-boot/custodians/u-boot-mmcTom Rini authored
- Cleanup of fsl_esdhc driver together with arch/defconfig change - Add quirk for APP_CMD retry
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https://gitlab.denx.de/u-boot/custodians/u-boot-marvellTom Rini authored
- Clearfog: Fix SD booting (Baruch) - Misc updates to MMC handling in SPL to support booting from main data partition (vs hardware boot partition) on MVEBU (Baruch)
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https://gitlab.denx.de/u-boot/custodians/u-boot-microblazeTom Rini authored
Xilinx/FPGA changes for v2020.04 ARM64: - Add INIT_SPL_RELATIVE dependency SPL: - FIT image fix - Enable customization of bl2_plat_get_bl31_params() Pytest: - Add test for octal/hex conversions Microblaze: - Fix manual relocation for one SPI instance Nand: - Convert zynq/zynqmp drivers to DM Xilinx: - Enable boot script location via Kconfig - Support OF_SEPARATE in board FDT selection - Remove low level uart setup it is done later by code - Add support for DEVICE_TREE variable passing for SPL Zynq: - Enable jtag boot mode via distro boot - Removing unused baseaddresses from hardware.h - DT fixups ZynqMP: - Fix emmc boot sequence - Simplify spl logic around bss and board_init_r() - Support psu_post_config_data() calling - Tune mini-nand DTS - Fix psu wiring for a2197 boards - Add runtime MMC device boot order filling in spl - Clear ATF handoff handling with custom bl2_plat_get_bl31_params() - Add support u-boot.its generation - Use single image configuration for all platforms - Enable PANIC_HANG via Kconfig - DT fixups - Firmware fixes - Add support for zcu208 and zcu1285 Versal: - Fix emmc boot sequence - Enable board_late_init() by default
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Tom Rini authored
- MediaTek improvements - Some generic clk improvements - A few assorted bugfixes
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This patch add CONFIG_TARGET_MT7623 into mt7623n_bpir2_defconfig to fix the mt7623 compile error after building others mediatek target platform Signed-off-by:
Sam Shih <sam.shih@mediatek.com> Reviewed-by:
Ryder Lee <ryder.lee@mediatek.com>
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This patch move u-boot properties to -u-boot.dtsi file. Signed-off-by:
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This adds a general board file based on MT7622 SoCs from MediaTek. This commit is adding the basic boot support for the MT7622 rfb. Signed-off-by:
Frank Wunderlich <frank-w@public-files.de>
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This patch add mmc and sd support for Mediatek MT7622 SoCs Signed-off-by:
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This patch add power domain support for Mediatek MT7622 SoCs Signed-off-by:
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This patch fix clock-rate overflow problem in mediatek clock driver common part. Signed-off-by:
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This patch add clock driver for MediaTek MT7622 SoC. Signed-off-by:
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Due to the pinctrl hardware of MT7622 is difference from others SoC which using the common part of mediatek pinctrl. So we need to modify the common part of mediatek pinctrl. Signed-off-by:
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This patch add Pinctrl driver for MediaTek MT7622 SoC. Signed-off-by:
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Add support for MediaTek MT7622 SoC. This include the file that will initialize the SoC after boot and its device tree. Signed-off-by:
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If make the ref clock optional, no need refer to fixed-clock when the ref clock is always on or comes from oscillator directly. Signed-off-by:
Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by:
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No need check -ENOSYS anymore after add dummy_enable() for fixed-clock. Signed-off-by:
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This is used to avoid clk_enable() return -ENOSYS. Signed-off-by:
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Sometimes we may need get (optional) clock without a device, that means use ofnode. e.g. when the phy node has subnode, and there is no device created for subnode, in this case, we need these new APIs to get subnode's clock. Signed-off-by:
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Add valid check for clk->dev, it's useful when get optional clock even when the clk point is valid, but its dev will be NULL. Signed-off-by:
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If skip all return error number, it may skip some real error cases, so only skip the error when the clock is not provided in DTS Signed-off-by:
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The SSUSB IP's clocks come from ssusbsys module on mt7629, so add its driver Signed-off-by:
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This adds a general board file based on MT8512 SoCs from MediaTek. Apart from the generic parts (cpu) we add some low level init codes and initialize the early clocks. This commit is adding the basic boot support for the MT8512 eMMC board. Signed-off-by:mingming lee <mingming.lee@mediatek.com>
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For CMD21 tuning data, the 128/64 bytes data may coming in very short time, before msdc_start_data(), the read data has already come, in this case, clear MSDC_INT will cause the interrupt disappear and lead to the thread hang. the solution is just clear all interrupts before command was sent. Signed-off-by: -
This patch adds mmc support for MediaTek MT8512/MT8110 SoCs. MT8512/MT8110 SoCs puts the tune register at top layer, so need add new code to support it. Signed-off-by: -
Add Pinctrl driver for MediaTek MT8512 SoC. Signed-off-by: -
Add configurable pcw_chg_reg/ibits/fmin to mtk_pll to support mt8512
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