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  1. Apr 22, 2024
    • André Przywara's avatar
      usb: musb-new: add Allwinner F1C100s support · 6f68b9ce
      André Przywara authored
      
      The Allwinner F1C100s SoC has a MUSB controller like the one in the A33,
      but needs an SRAM region to be claimed like the A10. We do the latter
      anyway, even on chips that don't need it, so there is no real difference
      in our compatible string matching.
      
      Add a mapping between the config struct used in the Linux to our
      requirements here on the way.
      
      Signed-off-by: default avatarAndre Przywara <andre.przywara@arm.com>
      6f68b9ce
  2. Apr 21, 2024
    • Maksim Kiselev's avatar
      sunxi: SPL SPI: Add SPI boot support for the Allwinner R528/T113 SoCs · 83d5e3c9
      Maksim Kiselev authored and André Przywara's avatar André Przywara committed
      
      R528/T113 SoCs uses the same SPI IP as the H6, also have the same clocks
      and reset bits layout, but the CCU base is different. Another difference
      is that the new SoCs do not have a clock divider inside. Instead of this
      we should configure sample mode depending on input clock rate.
      
      The pin assignment is also different: the H6 uses PC0, the R528/T113 PC4
      instead. This makes for a change in spi0_pinmux_setup() routine.
      
      This patch extends the H6/H616 #ifdef guards to also cover the R528/T113,
      using the shared CONFIG_SUNXI_GEN_NCAT2 and CONFIG_MACH_SUN8I_R528
      symbols. Also use CONFIG_SUNXI_GEN_NCAT2 symbol for the Kconfig
      dependency.
      
      Signed-off-by: default avatarMaksim Kiselev <bigunclemax@gmail.com>
      Tested-by: default avatarSam Edwards <CFSworks@gmail.com>
      83d5e3c9
  3. Apr 20, 2024
  4. Apr 19, 2024
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