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Commit 505dc1c6 authored by Chee Hong Ang's avatar Chee Hong Ang Committed by Ley Foon Tan
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Makefile: socfpga: Generate sfp file with 4 SPL images


Generate 'u-boot-splx4.sfp' which consist of 4 SPL images required
for booting up Cyclone5/Arria10.

By default, this 'u-boot-splx4.sfp' is generated without extra
padding after each SPL image.

For Cyclone5, 'u-boot-splx4.sfp' contains:
4 x SPL(64KB) = 256KB

For Arria10, 'u-boot-splx4.sfp' contains:
4 x SPL(256KB) = 1024KB

For Cyclone5 using NAND flash image layout for 128 KB memory blocks,
user can 'make' the following target to generate 4 SPL images with
padding:

make u-boot-spl-padx4.sfp

'u-boot-spl-padx4.sfp' contains four 128KB SPL images (each 64KB SPL is
followed by 64KB of zero-padding).
4 x (SPL(64KB) + zero-padding(64KB)) = 512KB

Signed-off-by: default avatarChee Hong Ang <chee.hong.ang@intel.com>
Signed-off-by: default avatarLey Foon Tan <ley.foon.tan@intel.com>
parent 269564cc
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