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Commit 83befb44 authored by Tom Rini's avatar Tom Rini
Browse files
- Enabled distro boot for all TI platforms.
- Cleanup for AM335x Guardian Board
- PRUSS rproc on AM65 platform.
- Add PMIC support for J7200
- Misc fixes for Nokia RX-51

# Conflicts:
#	arch/arm/mach-omap2/am33xx/Kconfig
parents abf0061e 65298230
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with 1005 additions and 216 deletions
......@@ -513,6 +513,7 @@ F: drivers/phy/phy-ti-am654.c
F: drivers/phy/ti-pipe3-phy.c
F: drivers/ram/k3*
F: drivers/remoteproc/k3_system_controller.c
F: drivers/remoteproc/pruc_rpoc.c
F: drivers/remoteproc/ti*
F: drivers/reset/reset-ti-sci.c
F: drivers/rtc/davinci.c
......@@ -522,6 +523,7 @@ F: drivers/sysreset/sysreset-ti-sci.c
F: drivers/thermal/ti-bandgap.c
F: drivers/timer/omap-timer.c
F: drivers/watchdog/omap_wdt.c
F: include/linux/pruss_driver.h
F: include/linux/soc/ti/
ARM U8500
......
......@@ -42,6 +42,17 @@
u-boot,dm-pre-reloc;
};
&spi0 {
lcd0: display@0 {
compatible = "himax,hx8238d";
pinctrl-names = "default";
pinctrl-0 = <&lcd0_pins>;
reg = <0>;
label = "lcd";
spi-max-frequency = <100000>;
};
};
&uart0 {
u-boot,dm-pre-reloc;
};
......
......@@ -87,7 +87,7 @@
ac-bias = <255>;
ac-bias-intrpt = <0>;
dma-burst-sz = <16>;
bpp = <24>;
bpp = <16>;
bus-width = <16>;
fdd = <0x80>;
sync-edge = <0>;
......@@ -247,6 +247,12 @@
&lcdc {
blue-and-red-wiring = "crossed";
status = "okay";
port {
lcdc_0: endpoint@0 {
remote-endpoint = <0>;
};
};
};
&mmc1 {
......@@ -401,12 +407,12 @@
guardian_interface_pins: pinmux_guardian_interface_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x928, PIN_OUTPUT | MUX_MODE7)
AM33XX_IOPAD(0x990, PIN_OUTPUT | MUX_MODE7)
AM33XX_IOPAD(0x990, PIN_OUTPUT_PULLUP | MUX_MODE7)
AM33XX_IOPAD(0x9ac, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x980, PIN_INPUT | MUX_MODE7)
AM33XX_IOPAD(0x984, PIN_INPUT | MUX_MODE7)
AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLUP | MUX_MODE7)
AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE7)
AM33XX_IOPAD(0x90c, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x944, PIN_OUTPUT_PULLDOWN | MUX_MODE7)
AM33XX_IOPAD(0x91c, PIN_INPUT | MUX_MODE7)
......
......@@ -13,8 +13,16 @@
#size-cells = <1>;
ranges = <0x0 0x00 0x70000000 0x200000>;
atf-sram@0 {
reg = <0x1a0000 0x1c000>;
tfa-sram@1c0000 {
reg = <0x1c0000 0x20000>;
};
dmsc-sram@1e0000 {
reg = <0x1e0000 0x1c000>;
};
sproxy-sram@1fc000 {
reg = <0x1fc000 0x4000>;
};
};
......
......@@ -926,4 +926,467 @@
clocks = <&ehrpwm_tbclk 5>, <&k3_clks 45 0>;
clock-names = "tbclk", "fck";
};
icssg0: icssg@b000000 {
compatible = "ti,am654-icssg";
reg = <0x00 0xb000000 0x00 0x80000>;
power-domains = <&k3_pds 62 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x00 0xb000000 0x80000>;
icssg0_mem: memories@0 {
reg = <0x0 0x2000>,
<0x2000 0x2000>,
<0x10000 0x10000>;
reg-names = "dram0", "dram1",
"shrdram2";
};
icssg0_cfg: cfg@26000 {
compatible = "ti,pruss-cfg", "syscon";
reg = <0x26000 0x200>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x26000 0x2000>;
clocks {
#address-cells = <1>;
#size-cells = <0>;
icssg0_coreclk_mux: coreclk-mux@3c {
reg = <0x3c>;
#clock-cells = <0>;
clocks = <&k3_clks 62 19>, /* icssg0_core_clk */
<&k3_clks 62 3>; /* icssg0_iclk */
assigned-clocks = <&icssg0_coreclk_mux>;
assigned-clock-parents = <&k3_clks 62 3>;
};
icssg0_iepclk_mux: iepclk-mux@30 {
reg = <0x30>;
#clock-cells = <0>;
clocks = <&k3_clks 62 10>, /* icssg0_iep_clk */
<&icssg0_coreclk_mux>; /* core_clk */
assigned-clocks = <&icssg0_iepclk_mux>;
assigned-clock-parents = <&icssg0_coreclk_mux>;
};
};
};
icssg0_iep0: iep@2e000 {
compatible = "ti,am654-icss-iep";
reg = <0x2e000 0x1000>;
clocks = <&icssg0_iepclk_mux>;
};
icssg0_iep1: iep@2f000 {
compatible = "ti,am654-icss-iep";
reg = <0x2f000 0x1000>;
clocks = <&icssg0_iepclk_mux>;
};
icssg0_mii_rt: mii-rt@32000 {
compatible = "ti,pruss-mii", "syscon";
reg = <0x32000 0x100>;
};
icssg0_mii_g_rt: mii-g-rt@33000 {
compatible = "ti,pruss-mii-g", "syscon";
reg = <0x33000 0x1000>;
};
icssg0_intc: interrupt-controller@20000 {
compatible = "ti,icssg-intc";
reg = <0x20000 0x2000>;
interrupt-controller;
#interrupt-cells = <3>;
interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "host_intr0", "host_intr1",
"host_intr2", "host_intr3",
"host_intr4", "host_intr5",
"host_intr6", "host_intr7";
};
pru0_0: pru@34000 {
compatible = "ti,am654-pru";
reg = <0x34000 0x4000>,
<0x22000 0x100>,
<0x22400 0x100>;
reg-names = "iram", "control", "debug";
firmware-name = "am65x-pru0_0-fw";
};
rtu0_0: rtu@4000 {
compatible = "ti,am654-rtu";
reg = <0x4000 0x2000>,
<0x23000 0x100>,
<0x23400 0x100>;
reg-names = "iram", "control", "debug";
firmware-name = "am65x-rtu0_0-fw";
};
tx_pru0_0: txpru@a000 {
compatible = "ti,am654-tx-pru";
reg = <0xa000 0x1800>,
<0x25000 0x100>,
<0x25400 0x100>;
reg-names = "iram", "control", "debug";
firmware-name = "am65x-txpru0_0-fw";
};
pru0_1: pru@38000 {
compatible = "ti,am654-pru";
reg = <0x38000 0x4000>,
<0x24000 0x100>,
<0x24400 0x100>;
reg-names = "iram", "control", "debug";
firmware-name = "am65x-pru0_1-fw";
};
rtu0_1: rtu@6000 {
compatible = "ti,am654-rtu";
reg = <0x6000 0x2000>,
<0x23800 0x100>,
<0x23c00 0x100>;
reg-names = "iram", "control", "debug";
firmware-name = "am65x-rtu0_1-fw";
};
tx_pru0_1: txpru@c000 {
compatible = "ti,am654-tx-pru";
reg = <0xc000 0x1800>,
<0x25800 0x100>,
<0x25c00 0x100>;
reg-names = "iram", "control", "debug";
firmware-name = "am65x-txpru0_1-fw";
};
icssg0_mdio: mdio@32400 {
compatible = "ti,davinci_mdio";
reg = <0x32400 0x100>;
clocks = <&k3_clks 62 3>;
clock-names = "fck";
#address-cells = <1>;
#size-cells = <0>;
bus_freq = <1000000>;
status = "disabled";
};
};
icssg1: icssg@b100000 {
compatible = "ti,am654-icssg";
reg = <0x00 0xb100000 0x00 0x80000>;
power-domains = <&k3_pds 63 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x00 0xb100000 0x80000>;
icssg1_mem: memories@0 {
reg = <0x0 0x2000>,
<0x2000 0x2000>,
<0x10000 0x10000>;
reg-names = "dram0", "dram1",
"shrdram2";
};
icssg1_cfg: cfg@26000 {
compatible = "ti,pruss-cfg", "syscon";
reg = <0x26000 0x200>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x26000 0x2000>;
clocks {
#address-cells = <1>;
#size-cells = <0>;
icssg1_coreclk_mux: coreclk-mux@3c {
reg = <0x3c>;
#clock-cells = <0>;
clocks = <&k3_clks 63 19>, /* icssg1_core_clk */
<&k3_clks 63 3>; /* icssg1_iclk */
assigned-clocks = <&icssg1_coreclk_mux>;
assigned-clock-parents = <&k3_clks 63 3>;
};
icssg1_iepclk_mux: iepclk-mux@30 {
reg = <0x30>;
#clock-cells = <0>;
clocks = <&k3_clks 63 10>, /* icssg1_iep_clk */
<&icssg1_coreclk_mux>; /* core_clk */
assigned-clocks = <&icssg1_iepclk_mux>;
assigned-clock-parents = <&icssg1_coreclk_mux>;
};
};
};
icssg1_iep0: iep@2e000 {
compatible = "ti,am654-icss-iep";
reg = <0x2e000 0x1000>;
clocks = <&icssg1_iepclk_mux>;
};
icssg1_iep1: iep@2f000 {
compatible = "ti,am654-icss-iep";
reg = <0x2f000 0x1000>;
clocks = <&icssg1_iepclk_mux>;
};
icssg1_mii_rt: mii-rt@32000 {
compatible = "ti,pruss-mii", "syscon";
reg = <0x32000 0x100>;
};
icssg1_mii_g_rt: mii-g-rt@33000 {
compatible = "ti,pruss-mii-g", "syscon";
reg = <0x33000 0x1000>;
};
icssg1_intc: interrupt-controller@20000 {
compatible = "ti,icssg-intc";
reg = <0x20000 0x2000>;
interrupt-controller;
#interrupt-cells = <3>;
interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "host_intr0", "host_intr1",
"host_intr2", "host_intr3",
"host_intr4", "host_intr5",
"host_intr6", "host_intr7";
};
pru1_0: pru@34000 {
compatible = "ti,am654-pru";
reg = <0x34000 0x4000>,
<0x22000 0x100>,
<0x22400 0x100>;
reg-names = "iram", "control", "debug";
firmware-name = "am65x-pru1_0-fw";
};
rtu1_0: rtu@4000 {
compatible = "ti,am654-rtu";
reg = <0x4000 0x2000>,
<0x23000 0x100>,
<0x23400 0x100>;
reg-names = "iram", "control", "debug";
firmware-name = "am65x-rtu1_0-fw";
};
tx_pru1_0: txpru@a000 {
compatible = "ti,am654-tx-pru";
reg = <0xa000 0x1800>,
<0x25000 0x100>,
<0x25400 0x100>;
reg-names = "iram", "control", "debug";
firmware-name = "am65x-txpru1_0-fw";
};
pru1_1: pru@38000 {
compatible = "ti,am654-pru";
reg = <0x38000 0x4000>,
<0x24000 0x100>,
<0x24400 0x100>;
reg-names = "iram", "control", "debug";
firmware-name = "am65x-pru1_1-fw";
};
rtu1_1: rtu@6000 {
compatible = "ti,am654-rtu";
reg = <0x6000 0x2000>,
<0x23800 0x100>,
<0x23c00 0x100>;
reg-names = "iram", "control", "debug";
firmware-name = "am65x-rtu1_1-fw";
};
tx_pru1_1: txpru@c000 {
compatible = "ti,am654-tx-pru";
reg = <0xc000 0x1800>,
<0x25800 0x100>,
<0x25c00 0x100>;
reg-names = "iram", "control", "debug";
firmware-name = "am65x-txpru1_1-fw";
};
icssg1_mdio: mdio@32400 {
compatible = "ti,davinci_mdio";
reg = <0x32400 0x100>;
clocks = <&k3_clks 63 3>;
clock-names = "fck";
#address-cells = <1>;
#size-cells = <0>;
bus_freq = <1000000>;
status = "disabled";
};
};
icssg2: icssg@b200000 {
compatible = "ti,am654-icssg";
reg = <0x00 0xb200000 0x00 0x80000>;
power-domains = <&k3_pds 64 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x00 0xb200000 0x80000>;
icssg2_mem: memories@0 {
reg = <0x0 0x2000>,
<0x2000 0x2000>,
<0x10000 0x10000>;
reg-names = "dram0", "dram1",
"shrdram2";
};
icssg2_cfg: cfg@26000 {
compatible = "ti,pruss-cfg", "syscon";
reg = <0x26000 0x200>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x26000 0x2000>;
clocks {
#address-cells = <1>;
#size-cells = <0>;
icssg2_coreclk_mux: coreclk-mux@3c {
reg = <0x3c>;
#clock-cells = <0>;
clocks = <&k3_clks 64 19>, /* icssg1_core_clk */
<&k3_clks 64 3>; /* icssg1_iclk */
assigned-clocks = <&icssg2_coreclk_mux>;
assigned-clock-parents = <&k3_clks 64 3>;
};
icssg2_iepclk_mux: iepclk-mux@30 {
reg = <0x30>;
#clock-cells = <0>;
clocks = <&k3_clks 64 10>, /* icssg1_iep_clk */
<&icssg2_coreclk_mux>; /* core_clk */
assigned-clocks = <&icssg2_iepclk_mux>;
assigned-clock-parents = <&icssg2_coreclk_mux>;
};
};
};
icssg2_iep0: iep@2e000 {
compatible = "ti,am654-icss-iep";
reg = <0x2e000 0x1000>;
clocks = <&icssg2_iepclk_mux>;
};
icssg2_iep1: iep@2f000 {
compatible = "ti,am654-icss-iep";
reg = <0x2f000 0x1000>;
clocks = <&icssg2_iepclk_mux>;
};
icssg2_mii_rt: mii-rt@32000 {
compatible = "ti,pruss-mii", "syscon";
reg = <0x32000 0x100>;
};
icssg2_mii_g_rt: mii-g-rt@33000 {
compatible = "ti,pruss-mii-g", "syscon";
reg = <0x33000 0x1000>;
};
icssg2_intc: interrupt-controller@20000 {
compatible = "ti,icssg-intc";
reg = <0x20000 0x2000>;
interrupt-controller;
#interrupt-cells = <3>;
interrupts = <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "host_intr0", "host_intr1",
"host_intr2", "host_intr3",
"host_intr4", "host_intr5",
"host_intr6", "host_intr7";
};
pru2_0: pru@34000 {
compatible = "ti,am654-pru";
reg = <0x34000 0x4000>,
<0x22000 0x100>,
<0x22400 0x100>;
reg-names = "iram", "control", "debug";
firmware-name = "am65x-pru2_0-fw";
};
rtu2_0: rtu@4000 {
compatible = "ti,am654-rtu";
reg = <0x4000 0x2000>,
<0x23000 0x100>,
<0x23400 0x100>;
reg-names = "iram", "control", "debug";
firmware-name = "am65x-rtu2_0-fw";
};
tx_pru2_0: txpru@a000 {
compatible = "ti,am654-tx-pru";
reg = <0xa000 0x1800>,
<0x25000 0x100>,
<0x25400 0x100>;
reg-names = "iram", "control", "debug";
firmware-name = "am65x-txpru2_0-fw";
};
pru2_1: pru@38000 {
compatible = "ti,am654-pru";
reg = <0x38000 0x4000>,
<0x24000 0x100>,
<0x24400 0x100>;
reg-names = "iram", "control", "debug";
firmware-name = "am65x-pru2_1-fw";
};
rtu2_1: rtu@6000 {
compatible = "ti,am654-rtu";
reg = <0x6000 0x2000>,
<0x23800 0x100>,
<0x23c00 0x100>;
reg-names = "iram", "control", "debug";
firmware-name = "am65x-rtu2_1-fw";
};
tx_pru2_1: txpru@c000 {
compatible = "ti,am654-tx-pru";
reg = <0xc000 0x1800>,
<0x25800 0x100>,
<0x25c00 0x100>;
reg-names = "iram", "control", "debug";
firmware-name = "am65x-txpru2_1-fw";
};
icssg2_mdio: mdio@32400 {
compatible = "ti,davinci_mdio";
reg = <0x32400 0x100>;
clocks = <&k3_clks 64 3>;
clock-names = "fck";
#address-cells = <1>;
#size-cells = <0>;
bus_freq = <1000000>;
status = "disabled";
};
};
};
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
* Copyright (C) 2018-2021 Texas Instruments Incorporated - http://www.ti.com/
*/
#include <dt-bindings/pinctrl/k3.h>
#include <dt-bindings/net/ti-dp83867.h>
#include "k3-am654-r5-base-board-u-boot.dtsi"
/ {
chosen {
stdout-path = "serial2:115200n8";
};
aliases {
serial2 = &main_uart0;
ethernet0 = &cpsw_port1;
usb0 = &usb0;
usb1 = &usb1;
spi0 = &ospi0;
spi1 = &ospi1;
};
};
&cbass_main{
u-boot,dm-spl;
main-navss {
u-boot,dm-spl;
};
};
&cbass_mcu {
u-boot,dm-spl;
mcu-navss {
u-boot,dm-spl;
ringacc@2b800000 {
reg = <0x0 0x2b800000 0x0 0x400000>,
<0x0 0x2b000000 0x0 0x400000>,
<0x0 0x28590000 0x0 0x100>,
<0x0 0x2a500000 0x0 0x40000>,
<0x0 0x28440000 0x0 0x40000>;
reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg";
u-boot,dm-spl;
ti,dma-ring-reset-quirk;
};
dma-controller@285c0000 {
reg = <0x0 0x285c0000 0x0 0x100>,
<0x0 0x284c0000 0x0 0x4000>,
<0x0 0x2a800000 0x0 0x40000>,
<0x0 0x284a0000 0x0 0x4000>,
<0x0 0x2aa00000 0x0 0x40000>,
<0x0 0x28400000 0x0 0x2000>;
reg-names = "gcfg", "rchan", "rchanrt", "tchan",
"tchanrt", "rflow";
u-boot,dm-spl;
};
};
};
&cbass_wakeup {
u-boot,dm-spl;
chipid@43000014 {
u-boot,dm-spl;
};
};
&secure_proxy_main {
u-boot,dm-spl;
};
&dmsc {
u-boot,dm-spl;
k3_sysreset: sysreset-controller {
compatible = "ti,sci-sysreset";
u-boot,dm-spl;
};
&pru0_0 {
remoteproc-name = "pru0_0";
};
&k3_pds {
u-boot,dm-spl;
&rtu0_0 {
remoteproc-name = "rtu0_0";
};
&k3_clks {
u-boot,dm-spl;
&tx_pru0_0 {
remoteproc-name = "tx_pru0_0";
};
&k3_reset {
u-boot,dm-spl;
&pru0_1 {
remoteproc-name = "pru0_1";
};
&wkup_pmx0 {
u-boot,dm-spl;
wkup_i2c0_pins_default {
u-boot,dm-spl;
};
};
&main_pmx0 {
u-boot,dm-spl;
usb0_pins_default: usb0_pins_default {
pinctrl-single,pins = <
AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) USB0_DRVVBUS */
>;
u-boot,dm-spl;
};
};
&main_uart0_pins_default {
u-boot,dm-spl;
};
&main_pmx1 {
u-boot,dm-spl;
&rtu0_1 {
remoteproc-name = "rtu0_1";
};
&wkup_pmx0 {
mcu-fss0-ospi0-pins-default {
u-boot,dm-spl;
};
&tx_pru0_1 {
remoteproc-name = "tx_pru0_1";
};
&main_uart0 {
u-boot,dm-spl;
&pru1_0 {
remoteproc-name = "pru1_0";
};
&main_mmc0_pins_default {
u-boot,dm-spl;
&rtu1_0 {
remoteproc-name = "rtu1_0";
};
&main_mmc1_pins_default {
u-boot,dm-spl;
&tx_pru1_0 {
remoteproc-name = "tx_pru1_0";
};
&sdhci0 {
u-boot,dm-spl;
&pru1_1 {
remoteproc-name = "pru1_1";
};
&sdhci1 {
u-boot,dm-spl;
&rtu1_1 {
remoteproc-name = "rtu1_1";
};
&davinci_mdio {
phy0: ethernet-phy@0 {
reg = <0>;
/* TODO: phy reset: TCA9555RTWR(i2c:0x21)[p04].GPIO_MCU_RGMII_RSTN */
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
};
&tx_pru1_1 {
remoteproc-name = "tx_pru1_1";
};
&mcu_cpsw {
reg = <0x0 0x46000000 0x0 0x200000>,
<0x0 0x40f00200 0x0 0x2>;
reg-names = "cpsw_nuss", "mac_efuse";
/delete-property/ ranges;
cpsw-phy-sel@40f04040 {
compatible = "ti,am654-cpsw-phy-sel";
reg= <0x0 0x40f04040 0x0 0x4>;
reg-names = "gmii-sel";
};
&pru2_0 {
remoteproc-name = "pru2_0";
};
&wkup_i2c0 {
u-boot,dm-spl;
};
&usb1 {
dr_mode = "peripheral";
};
&fss {
u-boot,dm-spl;
};
&ospi0 {
u-boot,dm-spl;
flash@0{
u-boot,dm-spl;
};
&rtu2_0 {
remoteproc-name = "rtu2_0";
};
&dwc3_0 {
status = "okay";
u-boot,dm-spl;
&tx_pru2_0 {
remoteproc-name = "tx_pru2_0";
};
&usb0_phy {
status = "okay";
u-boot,dm-spl;
&pru2_1 {
remoteproc-name = "pru2_1";
};
&usb0 {
pinctrl-names = "default";
pinctrl-0 = <&usb0_pins_default>;
dr_mode = "host";
u-boot,dm-spl;
&rtu2_1 {
remoteproc-name = "rtu2_1";
};
&scm_conf {
u-boot,dm-spl;
&tx_pru2_1 {
remoteproc-name = "tx_pru2_1";
};
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2018-2021 Texas Instruments Incorporated - http://www.ti.com/
*/
#include <dt-bindings/pinctrl/k3.h>
#include <dt-bindings/net/ti-dp83867.h>
/ {
chosen {
stdout-path = "serial2:115200n8";
};
aliases {
serial2 = &main_uart0;
ethernet0 = &cpsw_port1;
usb0 = &usb0;
usb1 = &usb1;
spi0 = &ospi0;
spi1 = &ospi1;
};
};
&cbass_main{
u-boot,dm-spl;
main-navss {
u-boot,dm-spl;
};
};
&cbass_mcu {
u-boot,dm-spl;
mcu-navss {
u-boot,dm-spl;
ringacc@2b800000 {
reg = <0x0 0x2b800000 0x0 0x400000>,
<0x0 0x2b000000 0x0 0x400000>,
<0x0 0x28590000 0x0 0x100>,
<0x0 0x2a500000 0x0 0x40000>,
<0x0 0x28440000 0x0 0x40000>;
reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg";
u-boot,dm-spl;
ti,dma-ring-reset-quirk;
};
dma-controller@285c0000 {
reg = <0x0 0x285c0000 0x0 0x100>,
<0x0 0x284c0000 0x0 0x4000>,
<0x0 0x2a800000 0x0 0x40000>,
<0x0 0x284a0000 0x0 0x4000>,
<0x0 0x2aa00000 0x0 0x40000>,
<0x0 0x28400000 0x0 0x2000>;
reg-names = "gcfg", "rchan", "rchanrt", "tchan",
"tchanrt", "rflow";
u-boot,dm-spl;
};
};
};
&cbass_wakeup {
u-boot,dm-spl;
chipid@43000014 {
u-boot,dm-spl;
};
};
&secure_proxy_main {
u-boot,dm-spl;
};
&dmsc {
u-boot,dm-spl;
k3_sysreset: sysreset-controller {
compatible = "ti,sci-sysreset";
u-boot,dm-spl;
};
};
&k3_pds {
u-boot,dm-spl;
};
&k3_clks {
u-boot,dm-spl;
};
&k3_reset {
u-boot,dm-spl;
};
&wkup_pmx0 {
u-boot,dm-spl;
wkup_i2c0_pins_default {
u-boot,dm-spl;
};
};
&main_pmx0 {
u-boot,dm-spl;
usb0_pins_default: usb0_pins_default {
pinctrl-single,pins = <
AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) USB0_DRVVBUS */
>;
u-boot,dm-spl;
};
};
&main_uart0_pins_default {
u-boot,dm-spl;
};
&main_pmx1 {
u-boot,dm-spl;
};
&wkup_pmx0 {
mcu-fss0-ospi0-pins-default {
u-boot,dm-spl;
};
};
&main_uart0 {
u-boot,dm-spl;
};
&main_mmc0_pins_default {
u-boot,dm-spl;
};
&main_mmc1_pins_default {
u-boot,dm-spl;
};
&sdhci0 {
u-boot,dm-spl;
};
&sdhci1 {
u-boot,dm-spl;
};
&davinci_mdio {
phy0: ethernet-phy@0 {
reg = <0>;
/* TODO: phy reset: TCA9555RTWR(i2c:0x21)[p04].GPIO_MCU_RGMII_RSTN */
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
};
};
&mcu_cpsw {
reg = <0x0 0x46000000 0x0 0x200000>,
<0x0 0x40f00200 0x0 0x2>;
reg-names = "cpsw_nuss", "mac_efuse";
/delete-property/ ranges;
cpsw-phy-sel@40f04040 {
compatible = "ti,am654-cpsw-phy-sel";
reg= <0x0 0x40f04040 0x0 0x4>;
reg-names = "gmii-sel";
};
};
&wkup_i2c0 {
u-boot,dm-spl;
};
&usb1 {
dr_mode = "peripheral";
};
&fss {
u-boot,dm-spl;
};
&ospi0 {
u-boot,dm-spl;
flash@0{
u-boot,dm-spl;
};
};
&dwc3_0 {
status = "okay";
u-boot,dm-spl;
};
&usb0_phy {
status = "okay";
u-boot,dm-spl;
};
&usb0 {
pinctrl-names = "default";
pinctrl-0 = <&usb0_pins_default>;
dr_mode = "host";
u-boot,dm-spl;
};
&scm_conf {
u-boot,dm-spl;
};
......@@ -330,5 +330,3 @@
&scm_conf {
u-boot,dm-spl;
};
#include "k3-am654-base-board-u-boot.dtsi"
......@@ -89,6 +89,13 @@
<&mcu_secproxy 23>;
u-boot,dm-spl;
};
wkup_vtm0: vtm@42040000 {
compatible = "ti,am654-vtm", "ti,j721e-avs";
reg = <0x0 0x42040000 0x0 0x330>;
power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
#thermal-sensor-cells = <1>;
};
};
&dmsc {
......@@ -239,6 +246,37 @@
ti,driver-strength-ohm = <50>;
};
&wkup_i2c0 {
u-boot,dm-spl;
lp876441: lp876441@4c {
compatible = "ti,lp876441";
reg = <0x4c>;
u-boot,dm-spl;
pinctrl-names = "default";
pinctrl-0 = <&wkup_i2c0_pins_default>;
clock-frequency = <400000>;
regulators: regulators {
u-boot,dm-spl;
buck1_reg: buck1 {
/*VDD_CPU_AVS_REG*/
regulator-name = "buck1";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1250000>;
regulator-always-on;
regulator-boot-on;
u-boot,dm-spl;
};
};
};
};
&wkup_vtm0 {
vdd-supply-2 = <&buck1_reg>;
u-boot,dm-spl;
};
&main_i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&main_i2c0_pins_default>;
......
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* (C) Copyright 2006-2008
* Texas Instruments, <www.ti.com>
*
* (C) Copyright 2020
* Robert Bosch Power Tools GmbH
*
* Author
* Moses Christopher <BollavarapuMoses.Christopher@in.bosch.com>
*
* Copied from:
* arch/arm/include/asm/arch-am33xx/mem.h
*
* Initial Code from:
* Mansoor Ahamed <mansoor.ahamed@ti.com>
* Richard Woodruff <r-woodruff2@ti.com>
*/
#ifndef _MEM_GUARDIAN_H_
#define _MEM_GUARDIAN_H_
/*
* GPMC settings -
* Definitions is as per the following format
* #define <PART>_GPMC_CONFIG<x> <value>
* Where:
* PART is the part name e.g. M_NAND - Micron Nand Flash
* x is GPMC config registers from 1 to 7 (there will be 7 macros)
* Value is corresponding value
*
* For every valid PRCM configuration there should be only one definition of
* the same.
*
* The following values are optimized for improving the NAND Read speed
* They are applicable and tested for Bosch Guardian Board.
* Read Speeds rose from 1.5MiBs to over 7.6MiBs
*
* Currently valid part Names are (PART):
* M_NAND - Micron NAND
*/
#define GPMC_SIZE_256M 0x0
#define GPMC_SIZE_128M 0x8
#define GPMC_SIZE_64M 0xC
#define GPMC_SIZE_32M 0xE
#define GPMC_SIZE_16M 0xF
#define M_NAND_GPMC_CONFIG1 0x00000800
#define M_NAND_GPMC_CONFIG2 0x00030300
#define M_NAND_GPMC_CONFIG3 0x00030300
#define M_NAND_GPMC_CONFIG4 0x02000201
#define M_NAND_GPMC_CONFIG5 0x00030303
#define M_NAND_GPMC_CONFIG6 0x000000C0
#define M_NAND_GPMC_CONFIG7 0x00000008
/* max number of GPMC Chip Selects */
#define GPMC_MAX_CS 8
/* max number of GPMC regs */
#define GPMC_MAX_REG 7
#define DBG_MPDB 6
#endif /* endif _MEM_GUARDIAN_H_ */
......@@ -59,8 +59,6 @@ u32 is_running_in_sdram(void);
u32 is_running_in_sram(void);
u32 is_running_in_flash(void);
u32 get_device_type(void);
void secureworld_exit(void);
void try_unlock_memory(void);
u32 get_boot_type(void);
void invalidate_dcache(u32);
u32 wait_on_value(u32, u32, void *, u32);
......
......@@ -141,7 +141,7 @@ int fdtdec_board_setup(const void *fdt_blob)
void board_init_f(ulong dummy)
{
#if defined(CONFIG_K3_LOAD_SYSFW)
#if defined(CONFIG_K3_LOAD_SYSFW) || defined(CONFIG_K3_AM64_DDRSS)
struct udevice *dev;
int ret;
#endif
......
......@@ -94,6 +94,8 @@ config TARGET_AM335X_GUARDIAN
select DM
select DM_SERIAL
select DM_GPIO
select DM_VIDEO
select DM_PANEL_HX8238D
config TARGET_AM335X_SL50
bool "Support am335x_sl50"
......
......@@ -23,7 +23,11 @@
#include <asm/arch/clock.h>
#include <asm/arch/gpio.h>
#include <asm/arch/i2c.h>
#if IS_ENABLED(CONFIG_TARGET_AM335X_GUARDIAN)
#include <asm/arch/mem-guardian.h>
#else
#include <asm/arch/mem.h>
#endif
#include <asm/arch/mmc_host_def.h>
#include <asm/arch/sys_proto.h>
#include <asm/global_data.h>
......
......@@ -15,7 +15,11 @@
#include <common.h>
#include <asm/io.h>
#include <asm/arch/cpu.h>
#if IS_ENABLED(CONFIG_TARGET_AM335X_GUARDIAN)
#include <asm/arch/mem-guardian.h>
#else
#include <asm/arch/mem.h>
#endif
#include <asm/arch/sys_proto.h>
#include <command.h>
#include <linux/mtd/omap_gpmc.h>
......
......@@ -71,12 +71,20 @@ const struct gpio_bank *const omap_gpio_bank = gpio_bank_34xx;
#endif
void early_system_init(void)
{
hw_data_init();
}
#if !defined(CONFIG_SKIP_LOWLEVEL_INIT) && \
!defined(CONFIG_SKIP_LOWLEVEL_INIT_ONLY)
/******************************************************************************
* Routine: secure_unlock
* Description: Setup security registers for access
* (GP Device only)
*****************************************************************************/
void secure_unlock_mem(void)
static void secure_unlock_mem(void)
{
struct pm *pm_rt_ape_base = (struct pm *)PM_RT_APE_BASE_ADDR_ARM;
struct pm *pm_gpmc_base = (struct pm *)PM_GPMC_BASE_ADDR_ARM;
......@@ -114,7 +122,7 @@ void secure_unlock_mem(void)
* configure secure registers and exit secure world
* general use.
*****************************************************************************/
void secureworld_exit(void)
static void secureworld_exit(void)
{
unsigned long i;
......@@ -145,7 +153,7 @@ void secureworld_exit(void)
* Description: If chip is GP/EMU(special) type, unlock the SRAM for
* general use.
*****************************************************************************/
void try_unlock_memory(void)
static void try_unlock_memory(void)
{
int mode;
int in_sdram = is_running_in_sdram();
......@@ -174,13 +182,6 @@ void try_unlock_memory(void)
return;
}
void early_system_init(void)
{
hw_data_init();
}
#if !defined(CONFIG_SKIP_LOWLEVEL_INIT) && \
!defined(CONFIG_SKIP_LOWLEVEL_INIT_ONLY)
/******************************************************************************
* Routine: s_init
* Description: Does early system init of muxing and clocks.
......
......@@ -9,19 +9,15 @@
*/
#include <common.h>
#include <cpsw.h>
#include <dm.h>
#include <env.h>
#include <env_internal.h>
#include <errno.h>
#include <i2c.h>
#include <init.h>
#include <led.h>
#include <miiphy.h>
#include <panel.h>
#include <linux/delay.h>
#include <asm/global_data.h>
#include <power/tps65217.h>
#include <power/tps65910.h>
#include <spl.h>
#include <watchdog.h>
#include <asm/arch/clock.h>
......@@ -29,13 +25,17 @@
#include <asm/arch/ddr_defs.h>
#include <asm/arch/gpio.h>
#include <asm/arch/hardware.h>
#include <asm/arch/mem.h>
#include <asm/arch/mmc_host_def.h>
#include <asm/arch/mem-guardian.h>
#include <asm/arch/omap.h>
#include <asm/arch/sys_proto.h>
#include <asm/emif.h>
#include <asm/gpio.h>
#include <asm/io.h>
#include <jffs2/load_kernel.h>
#include <mtd.h>
#include <nand.h>
#include <video.h>
#include <video_console.h>
#include "board.h"
DECLARE_GLOBAL_DATA_PTR;
......@@ -193,27 +193,11 @@ int board_init(void)
#ifdef CONFIG_BOARD_LATE_INIT
static void set_bootmode_env(void)
{
char *boot_device_name = NULL;
char *boot_mode_gpio = "gpio@44e07000_14";
int ret;
int value;
struct gpio_desc boot_mode_desc;
switch (gd->arch.omap_boot_device) {
case BOOT_DEVICE_NAND:
boot_device_name = "nand";
break;
case BOOT_DEVICE_USBETH:
boot_device_name = "usbeth";
break;
default:
break;
}
if (boot_device_name)
env_set("boot_device", boot_device_name);
ret = dm_gpio_lookup_name(boot_mode_gpio, &boot_mode_desc);
if (ret) {
printf("%s is not found\n", boot_mode_gpio);
......@@ -226,20 +210,138 @@ static void set_bootmode_env(void)
goto err;
}
value = dm_gpio_get_value(&boot_mode_desc);
value ? env_set("swi_status", "0") : env_set("swi_status", "1");
dm_gpio_set_dir_flags(&boot_mode_desc, GPIOD_IS_IN);
udelay(10);
ret = dm_gpio_get_value(&boot_mode_desc);
if (ret == 0) {
env_set("swi_status", "1");
} else if (ret == 1) {
env_set("swi_status", "0");
} else {
printf("swi status gpio error\n");
goto err;
}
return;
err:
env_set("swi_status", "err");
}
void lcdbacklight_en(void)
{
unsigned long brightness = env_get_ulong("backlight_brightness", 10, 50);
if (brightness > 99 || brightness == 0)
brightness = 99;
/*
* Brightness range:
* WLEDCTRL2 DUTY[6:0]
*
* 000 0000b = 1%
* 000 0001b = 2%
* ...
* 110 0010b = 99%
* 110 0011b = 100%
*
*/
tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, TPS65217_WLEDCTRL2,
brightness, 0xFF);
tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, TPS65217_WLEDCTRL1,
brightness != 0 ? 0x0A : 0x02, 0xFF);
}
#if IS_ENABLED(CONFIG_AM335X_LCD)
static void splash_screen(void)
{
struct udevice *video_dev;
struct udevice *console_dev;
struct video_priv *vid_priv;
struct mtd_info *mtd;
size_t len;
int ret;
struct mtd_device *mtd_dev;
struct part_info *part;
u8 pnum;
ret = uclass_get_device(UCLASS_VIDEO, 0, &video_dev);
if (ret != 0) {
debug("video device not found\n");
goto exit;
}
vid_priv = dev_get_uclass_priv(video_dev);
mtdparts_init();
if (find_dev_and_part(SPLASH_SCREEN_NAND_PART, &mtd_dev, &pnum, &part)) {
debug("Could not find nand partition\n");
goto splash_screen_text;
}
mtd = get_nand_dev_by_index(mtd_dev->id->num);
if (!mtd) {
debug("MTD partition is not valid\n");
goto splash_screen_text;
}
len = SPLASH_SCREEN_BMP_FILE_SIZE;
ret = nand_read_skip_bad(mtd, part->offset, &len, NULL,
SPLASH_SCREEN_BMP_FILE_SIZE,
(u_char *)SPLASH_SCREEN_BMP_LOAD_ADDR);
if (ret != 0) {
debug("Reading NAND partition failed\n");
goto splash_screen_text;
}
ret = video_bmp_display(video_dev, SPLASH_SCREEN_BMP_LOAD_ADDR, 0, 0, false);
if (ret != 0) {
debug("No valid bmp image found!!\n");
goto splash_screen_text;
} else {
goto exit;
}
splash_screen_text:
vid_priv->colour_fg = CONSOLE_COLOR_RED;
vid_priv->colour_bg = CONSOLE_COLOR_BLACK;
if (!uclass_first_device_err(UCLASS_VIDEO_CONSOLE, &console_dev)) {
debug("Found console\n");
vidconsole_position_cursor(console_dev, 17, 7);
vidconsole_put_string(console_dev, SPLASH_SCREEN_TEXT);
} else {
debug("No console device found\n");
}
exit:
return;
}
#endif /* CONFIG_AM335X_LCD */
int board_late_init(void)
{
int ret;
struct udevice *cdev;
#ifdef CONFIG_LED_GPIO
led_default_state();
#endif
set_bootmode_env();
ret = uclass_get_device(UCLASS_PANEL, 0, &cdev);
if (ret) {
debug("video panel not found: %d\n", ret);
return ret;
}
lcdbacklight_en();
if (IS_ENABLED(CONFIG_AM335X_LCD))
splash_screen();
return 0;
}
#endif /* CONFIG_BOARD_LATE_INIT */
......@@ -28,8 +28,9 @@ static struct module_pin_mux i2c0_pin_mux[] = {
static struct module_pin_mux guardian_interfaces_pin_mux[] = {
{OFFSET(mcasp0_ahclkx), (MODE(7) | PULLDOWN_EN)},
{OFFSET(mii1_txen), (MODE(7) | PULLDOWN_EN)},
{OFFSET(mcasp0_aclkx), (MODE(7) | PULLUP_EN)},
{OFFSET(mii1_txd0), (MODE(7) | PULLUP_EN)},
{OFFSET(mdio_clk), (MODE(7) | PULLUP_EN)},
{OFFSET(uart1_rxd), (MODE(7) | RXACTIVE | PULLUDDIS)},
{OFFSET(uart1_txd), (MODE(7) | PULLUDDIS)},
{OFFSET(mii1_crs), (MODE(7) | PULLDOWN_EN)},
......
......@@ -27,6 +27,9 @@ imagesize: /* maximal size of image */
ih_magic: /* IH_MAGIC in big endian from include/image.h */
.word 0x56190527
z_magic: /* LINUX_ARM_ZIMAGE_MAGIC */
.word 0x016f2818
/*
* Routine: save_boot_params (called after reset from start.S)
* Description: Copy attached kernel to address KERNEL_ADDRESS
......@@ -75,6 +78,12 @@ copy_kernel_start:
ldr r4, [r0] /* r4 - 4 bytes header of kernel */
ldr r5, ih_magic /* r5 - IH_MAGIC */
cmp r4, r5
beq copy_kernel_loop
/* check for valid kernel zImage */
ldr r4, [r0, #36] /* r4 - 4 bytes header of kernel at offset 36 */
ldr r5, z_magic /* r5 - LINUX_ARM_ZIMAGE_MAGIC */
cmp r4, r5
bne copy_kernel_end /* skip if invalid image */
copy_kernel_loop:
......@@ -85,7 +94,8 @@ copy_kernel_loop:
copy_kernel_end:
mov r5, #0
str r5, [r0] /* remove 4 bytes header of kernel */
str r5, [r0] /* remove 4 bytes header of kernel uImage */
str r5, [r0, #36] /* remove 4 bytes header of kernel zImage */
/* Fix u-boot code */
......
......@@ -16,7 +16,7 @@ CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
CONFIG_AUTOBOOT_DELAY_STR="d"
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_BOOTCOMMAND="if test ${boot_fit} -eq 1; then run update_to_fit; fi; run findfdt; run init_console; run envboot; run distro_bootcmd"
CONFIG_BOOTCOMMAND="run findfdt; run init_console; run finduuid; run distro_bootcmd"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_SPL_MUSB_NEW_SUPPORT=y
......
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