clk: renesas: Pass struct cpg_mssr_info to renesas_clk_endisable()
CPG IP in some specific Renesas SoCs (i.e. new R8A779A0 V3U SoC) requires a different setting procedure. Make struct cpg_mssr_info accessible to handle the clock setting in that case. Signed-off-by:Hai Pham <hai.pham.ud@renesas.com> Signed-off-by:
Marek Vasut <marek.vasut+renesas@gmail.com>
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- drivers/clk/renesas/clk-rcar-gen2.c 2 additions, 2 deletionsdrivers/clk/renesas/clk-rcar-gen2.c
- drivers/clk/renesas/clk-rcar-gen3.c 2 additions, 2 deletionsdrivers/clk/renesas/clk-rcar-gen3.c
- drivers/clk/renesas/renesas-cpg-mssr.c 2 additions, 1 deletiondrivers/clk/renesas/renesas-cpg-mssr.c
- drivers/clk/renesas/renesas-cpg-mssr.h 2 additions, 1 deletiondrivers/clk/renesas/renesas-cpg-mssr.h
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