- Feb 04, 2020
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The default reserved memory for CMA is high memory. If LPAE is enabled, highmem pages are non-remapped and can not be used with dma_alloc_coherent. This patch will reserve low memory for CMA and fix the issue on LS1021A. Signed-off-by:
Peng Ma <peng.ma@nxp.com> Signed-off-by:
Shengzhou Liu <Shengzhou.Liu@nxp.com> Signed-off-by:
Alison Wang <alison.wang@nxp.com> Reviewed-by:
Priyanka Jain <priyanka.jain@nxp.com>
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This supports i2c DM and enables CONFIG_DM_I2C for SoC LS1021A Signed-off-by:
Biwen Li <biwen.li@nxp.com> Signed-off-by:
Priyanka Jain <priyanka.jain@nxp.com>
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This supports i2c DM and enables CONFIG_DM_I2C for SoC LS1012A Signed-off-by:
Biwen Li <biwen.li@nxp.com> Signed-off-by:
Priyanka Jain <priyanka.jain@nxp.com>
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The default value of CONFIG_SYS_MALLOC_F_LEN (0x400) leaves U-Boot with not enough memory to load i2c driver before relocate, causing it to hang. Change the default value of CONFIG_SYS_MALLOC_F_LEN for below SoCs, - LS1012A - LS1021A - LS1043A - LS1046A Signed-off-by:
Biwen Li <biwen.li@nxp.com> Reviewed-by:
Priyanka Jain <priyanka.jain@nxp.com>
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This adds DM_FLAG_PRE_RELOC flag to probe i2c driver before relocation Signed-off-by:
Biwen Li <biwen.li@nxp.com> Reviewed-by:
Priyanka Jain <priyanka.jain@nxp.com>
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Fix below SPL build error when DM_I2C is enabled, - arch/arm/cpu/armv8/built-in.o: In function `board_init_f: arch/arm/cpu/armv8/fsl-layerscape/spl.c:74: undefined reference to `i2c_init_all' arch/arm/cpu/armv8/fsl-layerscape/spl.c:74:(.text.board_init_f+0x30): relocation truncated to fit: R_AARCH64_CALL26 against undefined symbol `i2c_init_all' make[2]: *** [spl/u-boot-spl] Error 1 make[1]: *** [spl/u-boot-spl] Error 2 make: *** [sub-make] Error 2 arch/arm/cpu/armv8/fsl-layerscape/spl.c: In function 'board_init_f': arch/arm/cpu/armv8/fsl-layerscape/spl.c:74:2: warning: implicit declaration of function 'i2c_init_all'; did you mean 'misc_init_r'? [-Wimplicit-function-declaration]` Signed-off-by:
Biwen Li <biwen.li@nxp.com> Reviewed-by:
Priyanka Jain <priyanka.jain@nxp.com>
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Add support of driver model of pcf8563 Signed-off-by:
Biwen Li <biwen.li@nxp.com> Signed-off-by:
Priyanka Jain <priyanka.jain@nxp.com>
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Enable FSPI controller support. So, flash environment can now be used Signed-off-by:
Kuldeep Singh <kuldeep.singh@nxp.com> Reviewed-by:
Priyanka Jain <priyanka.jain@nxp.com>
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Align flexspi node properties with linux device-tree properties Tested on LX2160A-RDB Signed-off-by:
Kuldeep Singh <kuldeep.singh@nxp.com> Reviewed-by:
Priyanka Jain <priyanka.jain@nxp.com>
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Align flexspi node properties with linux device-tree properties Tested on LS1028A-RDB Signed-off-by:
Kuldeep Singh <kuldeep.singh@nxp.com> Reviewed-by:
Priyanka Jain <priyanka.jain@nxp.com>
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Add support of "qixis_reset emmc" command for lx2160a based platforms Signed-off-by:
Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com> Reviewed-by:
Priyanka Jain <priyanka.jain@nxp.com>
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Sync the interrupt properties with the ones from Linux. Also use the constants provided by the dt-bindings header. Please note, that there are actual changes/fixes in the irq flags. U-Boot won't use the interrupt properties anyway. It's just to be consistent with the Linux device tree. Signed-off-by:
Michael Walle <michael@walle.cc> Reviewed-by:
Priyanka Jain <priyanka.jain@nxp.com>
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Also align the fspi node with the kernel one. Signed-off-by:
Michael Walle <michael@walle.cc> Reviewed-by:
Kuldeep Singh <kuldeep.singh@nxp.com> Reviewed-by:
Priyanka Jain <priyanka.jain@nxp.com>
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Enable the config for ls1012ardb as the entry got missed earlier. Fixes: 8d8ee47e ("env: Add CONFIG_SYS_RELOC_GD_ENV_ADDR symbol") Signed-off-by:
Kuldeep Singh <kuldeep.singh@nxp.com> Reviewed-by:
Priyanka Jain <priyanka.jain@nxp.com>
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- Feb 02, 2020
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Guillermo Rodríguez authored
Add a new option to enable the DROP_FFS flag when flashing UBI images to NAND in order to drop trailing all-0xff pages. This is similar to the existing FASTBOOT_FLASH_NAND_TRIMFFS option. Signed-off-by:
Guillermo Rodriguez <guille.rodriguez@gmail.com> Cc: Lukasz Majewski <lukma@denx.de>
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Vignesh Raghavendra authored
Invalidate dcache line before accessing Setup Packet contents. Otherwise driver will see stale content on non coherent architecture. Signed-off-by:
Vignesh Raghavendra <vigneshr@ti.com>
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- Feb 01, 2020
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https://gitlab.denx.de/u-boot/custodians/u-boot-rockchipTom Rini authored
- Support redundant boot for rk3399 - Support binman for rockchip platform - Update ram driver and add ddr4 support for rk3328
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- Jan 31, 2020
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https://gitlab.denx.de/u-boot/custodians/u-boot-uniphierTom Rini authored
UniPhier SoC updates for v2020.04 (2nd) Denali NAND driver changes: - Set up more registers in denali-spl for SOCFPGA - Make clocks optional - Do not assert reset signals in the remove hook - associate SPARE_AREA_SKIP_BYTES with DT compatible - switch to UCLASS_MTD UniPhier platform changes: - fix a bug in dram_init() - specify loadaddr for "source" command
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Masahiro Yamada authored
If the "source" command is not given the address, it uses CONFIG_SYS_LOAD_ADDR, which is compile-time determined. Using the "loadaddr" environment variable is handier because it is relocated according to the memory base when CONFIG_POSITION_INDEPENDENT is enabled. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
gd->ram_base is not set at all if the end address of the DRAM ch0 exceeds the 4GB limit. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
UCLASS_MTD is a better fit for NAND drivers. Make NAND_DENALI_DT depend on DM_MTD, which is needed to compile drivers/mtd/mtd-uclass.c Also, make ARCH_UNIPHIER select DM_MTD because all the defconfig of this platform enables NAND_DENALI_DT. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by:
Miquel Raynal <miquel.raynal@bootlin.com>
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Masahiro Yamada authored
Now that the reset controlling of the Denali NAND driver (denali_dt.c) works for this platform, remove the adhoc reset deassert code. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
Currently, the denali NAND driver in U-Boot configures the SPARE_AREA_SKIP_BYTES based on the CONFIG option. Recently, Linux kernel merged a patch that associates the proper value for this register with the DT compatible string. Do likewise in U-Boot too. The denali_spl.c still uses CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
When the reset signal is de-asserted, the HW-controlled bootstrap starts running unless it is disabled in the SoC integration. It issues some commands to detect a NAND chip, and sets up registers automatically. Until this process finishes, software should avoid any register access. Without this delay function, some of UniPhier boards hangs up while executing nand_scan_ident(). (denali_read_byte() is blocked) Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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The Denali NAND driver in mainline Linux currently cannot deassert the reset. The upcoming Linux 5.6 will support the reset controlling, and also set up SPARE_AREA_SKIP_BYTES correctly. So, the Denali driver in the future kernel will work without relying on any bootloader or firmware. However, we still need to take care of stable kernel versions for a while. U-boot should not assert the reset of this controller. Fixes: ed784ac3 ("mtd: rawnand: denali: add reset handling") Signed-off-by:
Marek Vasut <marex@denx.de> [yamada.masahiro: reword the commit description] Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Masahiro Yamada authored
The "nand_x" and "ecc" clocks are currently optional. Make the core clock optional in the same way. This will allow platforms with no clock driver support to use this driver. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com> Tested-by: Marek Vasut <marex@denx.de> # On SoCFPGA Arria V
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On Altera SoCFPGA, upon either cold-boot or power-on reset, the Denali NAND IP is initialized by the BootROM ; upon warm-reset, the Denali NAND IP is NOT initialized by BootROM. In fact, upon warm-reset, the SoCFPGA BootROM checks whether the SPL image in on-chip RAM is valid and if so, completely skips re-loading the SPL from the boot media. This does sometimes lead to problems where the software left the boot media in inconsistent state before warm-reset, and because the BootROM does not reset the boot media, the boot media is left in this inconsistent state, often until another component attempts to access the boot media and fails with an difficult to debug failure. To mitigate this problem, the SPL on Altera SoCFPGA always resets all the IPs on the SoC early on boot. This results in a couple of register values, pre-programmed by the BootROM, to be lost during this reset. To restore correct operation of the IP on SoCFPGA, these values must be programmed back into the controller by the driver. Note that on other SoCs which do not use the HW-controlled bootstrap, more registers may have to be programmed. This also aligns the SPL behavior with the full Denali NAND driver, which sets these values in denali_hw_init(). Signed-off-by:
Marek Vasut <marex@denx.de> Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com>
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Tom Rini authored
- Assorted minor fixes - Revert 6dcb8ba4 from upstream libfdt to restore boot-time speed on many platforms.
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- Jan 30, 2020
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Same as the upstream fix for building dtc with gcc 10. Signed-off-by:
Peter Robinson <pbrobinson@gmail.com>
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Since commit e1910d93 ("doc: driver-model: Convert MIGRATION.txt to reST") MIGRATION.txt has been converted to migration.rst, so update the Makefile references accordingly. Fixes: e1910d93 ("doc: driver-model: Convert MIGRATION.txt to reST") Signed-off-by:
Fabio Estevam <festevam@gmail.com> Reviewed-by:
Tom Rini <trini@konsulko.com>
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Signed-off-by:
Flavio Suligoi <f.suligoi@asem.it> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Signed-off-by:
Flavio Suligoi <f.suligoi@asem.it>
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Signed-off-by:
Jorge Ramirez-Ortiz <jorge@foundries.io>
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Signed-off-by:
Jorge Ramirez-Ortiz <jorge@foundries.io>
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Tom Rini authored
In upstream libfdt, 6dcb8ba4 "libfdt: Add helpers for accessing unaligned words" introduced changes to support unaligned reads for ARM platforms and 11738cf01f15 "libfdt: Don't use memcpy to handle unaligned reads on ARM" improved the performance of these helpers. In practice however, this only occurs when the user has forced the device tree to be placed in memory in a non-aligned way, which in turn violates both our rules and the Linux Kernel rules for how things must reside in memory to function. This "in practice" part is important as handling these other cases adds visible (1 second or more) delay to boot in what would be considered the fast path of the code. Cc: Patrice CHOTARD <patrice.chotard@st.com> Cc: Patrick DELAUNAY <patrick.delaunay@st.com> Link: https://www.spinics.net/lists/devicetree-compiler/msg02972.html Signed-off-by:
Tom Rini <trini@konsulko.com> Tested-by:
Patrice Chotard <patrice.chotard@st.com>
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Coreutils command nproc can be used on Linux and BSD to count the number of available CPU cores. Use this instead of relying on the parsing of the Linux specific proc file system. Signed-off-by:
Heinrich Schuchardt <xypron.glpk@gmx.de>
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As hinted by GCC 9, there is a return statement that returns an uninitialized variable in optee_copy_firmware_node(). This patch addresses this. Signed-off-by:
Christoph Müllner <christoph.muellner@theobroma-systems.com> Reviewed-by:
Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
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Remove incorrect indentation. Signed-off-by:
Heinrich Schuchardt <xypron.glpk@gmx.de>
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This removes the arch-specific checks for "checkcpu" function from the init sequence. Make "checkcpu" generic and provide a weak nop stub instead. Signed-off-by:
Ovidiu Panait <ovpanait@gmail.com>
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