- Feb 23, 2023
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Apply the GPT U-Boot environment GUID type look up only on eMMC user HW partition, do not apply the look up on eMMC boot HW partitions as mmc_offset_try_partition() assumes either SD partitions or eMMC user HW partition. This fixes environment operation on systems where CONFIG_SYS_MMC_ENV_PART is non-zero and CONFIG_SYS_REDUNDAND_ENVIRONMENT is set. Fixes: 80105d8f ("env: mmc: select GPT env partition by type guid") Signed-off-by:
Marek Vasut <marex@denx.de> Reviewed-by:
Tom Rini <trini@konsulko.com>
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We expect the profile and bootstage to agree on timing, but when running on slow machines there can be a larger descrepency. Increase the tolerance to fix this. Fixes: 9cea4797 ("trace: Add a test") Signed-off-by:
Simon Glass <sjg@chromium.org>
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Tom Rini authored
To match how we link EFI executables elsewhere, and to silence a linker warning, pass -z execstack here as well. Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by:
Tom Rini <trini@konsulko.com>
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Tom Rini authored
When moving to gcc-12.2 we started trying to quiet some of the new linker warnings, that are not relevant to us. However, a misunderstanding of the mechanics at play meant that I intentionally omitted passing -z noexecstack to the linker, when we do need to. Add this flag and in turn remove warnings from the linker. Fixes: 1e1c51f8 ("Makefile: link with --no-warn-rwx-segments") Signed-off-by:
Tom Rini <trini@konsulko.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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[BUG] There is a bug report that btrfs driver caused hang during file read: This breaks btrfs on the HiFive Unmatched. => pci enum PCIE-0: Link up (Gen1-x8, Bus0) => nvme scan => load nvme 0:2 0x8c000000 /boot/dtb/sifive/hifive-unmatched-a00.dtb [hangs] [CAUSE] The reporter provided some debug output: read_extent_data: cur=615817216, orig_len=16384, cur_len=16384 read_extent_data: btrfs_map_block: cur_len=479944704; ret=0 read_extent_data: ret=0 read_extent_data: cur=615833600, orig_len=4096, cur_len=4096 read_extent_data: btrfs_map_block: cur_len=479928320; ret=0 Note the second and the last line, the @cur_len is 450+MiB, which is almost a chunk size. And inside __btrfs_map_block(), we limits the returned value to stripe length, but that's depending on the chunk type: if (map->type & (BTRFS_BLOCK_GROUP_RAID0 | BTRFS_BLOCK_GROUP_RAID1 | BTRFS_BLOCK_GROUP_RAID1C3 | BTRFS_BLOCK_GROUP_RAID1C4 | BTRFS_BLOCK_GROUP_RAID5 | BTRFS_BLOCK_GROUP_RAID6 | BTRFS_BLOCK_GROUP_RAID10 | BTRFS_BLOCK_GROUP_DUP)) { /* we limit the length of each bio to what fits in a stripe */ *length = min_t(u64, ce->size - offset, map->stripe_len - stripe_offset); } else { *length = ce->size - offset; } This means, if the chunk is SINGLE profile, then we don't limit the returned length at all, and even for other profiles, we can still return a length much larger than the requested one. [FIX] Properly clamp the returned length, preventing it from returning a much larger range than expected. Reported-by:
Andreas Schwab <schwab@linux-m68k.org> Signed-off-by:
Qu Wenruo <wqu@suse.com>
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- Feb 22, 2023
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- Feb 21, 2023
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This file was missed during the conversion process. Add the symbol to defconfig. Signed-off-by:
Paweł Anikiel <pan@semihalf.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Add devicetree for chameleonv3 with the 270-2I2-D11E variant of the Mercury+ AA1 module Signed-off-by:
Paweł Anikiel <pan@semihalf.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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This file is included by the different chameleonv3 variants. Change the name to .dtsi. Signed-off-by:
Paweł Anikiel <pan@semihalf.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Set the bitstream name per Chameleon variant. This allows the same boot filesystem with all bitstream variants to be used on different boards. Signed-off-by:
Paweł Anikiel <pan@semihalf.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Move the environment to an easily editable text file in the boot partition Signed-off-by:
Paweł Anikiel <pan@semihalf.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Allow SPL to boot from an ext4 filesystem. Signed-off-by:
Paweł Anikiel <pan@semihalf.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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As the "reset-gpios" property is optional, don't return the error and just skip the gpio reset sequence. Signed-off-by:
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
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- Feb 19, 2023
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https://source.denx.de/u-boot/custodians/u-boot-efiTom Rini authored
Pull request for efi-2023-04-rc3 Documentation * Add a document for the RISC-V architecture * Move gateworks and bcm7xxx documentation to HTML UEFI * measure the loaded device-tree * make CapsuleMax configurable and provide sensible default
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Heinrich Schuchardt authored
We have been using Sphinx >=3 since 2020. We don't expect issues. Signed-off-by:
Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
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Adds CONFIG_EFI_CAPSULE_MAX to configure the max index value used in EFI capsule reports. Prior to this change is the hard coded value was 65535 which would exceed available storage for variables. Now the default value is 15 which should work fine with most systems. Signed-off-by:
Etienne Carriere <etienne.carriere@linaro.org>
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Measures the DTB passed to the EFI application upon new boolean config switch CONFIG_EFI_TCG2_PROTOCOL_MEASURE_DTB. For platforms where the content of the DTB passed to the OS can change across reboots, there is not point measuring it hence the config switch to allow platform to not embed this feature. Co-developed-by:
Ilias Apalodimas <ilias.apalodimas@linaro.org> Signed-off-by:
Ilias Apalodimas <ilias.apalodimas@linaro.org> Signed-off-by:
Etienne Carriere <etienne.carriere@linaro.org> Tested-by:
Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by:
Ilias Apalodimas <ilias.apalodimas@linaro.org>
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QueryVariableInfo with EFI_VARIABLE_HARDWARE_ERROR_RECORD is accepted, remove wrong attribute check. Fixes: 454a9442 ("efi_loader: update attribute check for QueryVariableInfo()") Signed-off-by:
Masahisa Kojima <masahisa.kojima@linaro.org> Reviewed-by:
Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
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Heinrich Schuchardt authored
We should not scan beyond the end of string name. Signed-off-by:
Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
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This patch adds a brief introduction to the RISC-V architecture and the typical boot process used on a variety of RISC-V platforms. Signed-off-by:
Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by:
Samuel Holland <samuel@sholland.org> Reviewed-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Rick Chen <rick@andestech.com> Reviewed-by:
Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
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Move board/gateworks/venice/README to RST documentation. Signed-off-by:
Tim Harvey <tharvey@gateworks.com>
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Convert the documentation for the Broadcom BCM7445 and BCM7260 boards to reStructuredText format and add the new filename to doc/board/broadcom/index.rst. Signed-off-by:
Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
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Fix typo and whitespace in the document. Signed-off-by:
Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by:
Heinrich Schuchardt <xypron.glpk@gmx.de>
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- Feb 17, 2023
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Tom Rini authored
- avb_verify bugfix, and cpsw_mdio bugfix
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The arg->session is not valid if arg->ret != NULL, so can't be assigned, correct this. Signed-off-by:
Ivan Khoronzhuk <ivan.khoronzhuk@globallogic.com> Reviewed-by:
Jens Wiklander <jens.wiklander@linaro.org>
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cpsw_mdio_get_alive reads the wrong register. See page 2316 in SPRUH73Q AM335x TRM Signed-off-by:
Ulf Samuelsson <ulf@emagii.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Ramon Fried <rfried.dev@gmail.com> Reviewed-by:
Siddharth Vadapalli <s-vadapalli@ti.com>
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Tom Rini authored
Rsync all defconfig files using moveconfig.py Signed-off-by:
Tom Rini <trini@konsulko.com>
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https://source.denx.de/u-boot/custodians/u-boot-riscvTom Rini authored
- binman: Add help message if opensbi is absent when building u-boot SPL - AndesTech: rename cpu and board name to 'andesv5' and 'ae350' - Clean up cache operation for Andes ae350 platform
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Rick Chen authored
Add the 'missing-msg' for more detailed output on missing system firmware. Signed-off-by:
Rick Chen <rick@andestech.com> Reviewed-by:
Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by:
Yu Chien Peter Lin <peterlin@andestech.com>
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Leo Yu-Chi Liang authored
Adjust the initial stack pointer address to 0x10000000(256M) Signed-off-by:
Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by:
Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by:
Rick Chen <rick@andestech.com>
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Leo Yu-Chi Liang authored
The current ae350-related defconfigs could also support newer Andes CPU IP, so modify the names of CPU from ax25 to andesv5, and board name from ax25-ae350 to ae350. Signed-off-by:
Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by:
Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by:
Rick Chen <rick@andestech.com>
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Yu Chien Peter Lin authored
This patch fixes following warning for the riscv32 toolchain. drivers/cache/cache-v5l2.c:122:16: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] 122 | regs = (struct l2cache *)dev_read_addr(dev); | ^ Signed-off-by:
Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by:
Leo Yu-Chi Liang <ycliang@andestech.com>
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Yu Chien Peter Lin authored
Display information about CPU and board during start up. Signed-off-by:
Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by:
Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by:
Rick Chen <rick@andestech.com>
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Yu Chien Peter Lin authored
Loading an image via TFTP is often interrupted when retrying more than 10 times, increase the number of retries so that it does not simply stop the transfer. Signed-off-by:
Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by:
Leo Yu-Chi Liang <ycliang@andestech.com>
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Yu Chien Peter Lin authored
To reduce the code size, CONFIG_V5L2_CACHE was disabled since commit: ca06444a Turing on does not significantly increase the size of u-boot-spl.bin, so we enable it by default to improve performance. Signed-off-by:
Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by:
Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by:
Rick Chen <rick@andestech.com>
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Yu Chien Peter Lin authored
This patch refines L1 cache enable/disable and v5l2-cache enable functions. Signed-off-by:
Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by:
Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by:
Rick Chen <rick@andestech.com>
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Yu Chien Peter Lin authored
Update the compatible string of L2 cache. Signed-off-by:
Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by:
Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by:
Rick Chen <rick@andestech.com>
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Yu Chien Peter Lin authored
As the OpenSBI v1.2 does not enable the cache [0], we enable the i/d-cache in harts_early_init() and do not disable in cleanup_before_linux(). This patch also simplifies the logic and moves the CSR encoding to include/asm/arch-andes/csr.h. [0] https://github.com/riscv-software-src/opensbi/commit/bd7ef4139829da5c30fa980f7498d385124408fa Signed-off-by:
Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by:
Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by:
Rick Chen <rick@andestech.com>
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Yu Chien Peter Lin authored
The L2C configuration register has MAP field to indicate its version is v0 (Gen1) or v1 (Gen2) L2-cache. This patch makes the driver compatible with both memory-mapped scheme. Signed-off-by:
Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by:
Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by:
Rick Chen <rick@andestech.com>
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