• Jagan Teki's avatar
    mmc: sdhci: Fix HISPD bit handling · f12341a9
    Jagan Teki authored and Peng Fan's avatar Peng Fan committed
    
    
    SDHCI HISPD bits need to be configured based on desired mmc
    timings mode and some HISPD quirks.
    
    So, handle the HISPD bit based on the mmc computed selected
    mode(timing parameter) rather than fixed mmc card clock
    frequency.
    
    Linux handle the HISPD similar like this in below commit but no
    SDHCI_QUIRK_BROKEN_HISPD_MODE,
    
    commit <501639bf2173> ("mmc: sdhci: fix SDHCI_QUIRK_NO_HISPD_BIT handling")
    
    This eventually fixed the mmc write issue observed in
    rk3399 sdhci controller.
    
    Bug log for refernece,
    => gpt write mmc 0 $partitions
    Writing GPT: mmc write failed
    ** Can't write to device 0 **
    ** Can't write to device 0 **
    error!
    
    Cc: Kever Yang <kever.yang@rock-chips.com>
    Cc: Peng Fan <peng.fan@nxp.com>
    Peng Fan: added back "ctrl &= ~SDHCI_CTRL_HISPD;" per Jaehoon's suggestion
    Tested-by: Suniel Mahesh <sunil@amarulasolutions.com> # roc-rk3399-pc
    Signed-off-by: Jagan Teki's avatarJagan Teki <jagan@amarulasolutions.com>
    f12341a9