Sean Anderson authored Dec 02, 2022 and Tom Rini committed Jan 11, 2023

This adds support for reading the battery-backed memory present on these
RTCs. This modifies the read/write methods to access the RAM instead of
raw register offsets. No one was using these in-tree, so we should be
fine changing them.

We use the "standard" address space window to access the RAM. The
extension RAM address register has some reserved bits, but we write the
whole thing for simplicity (as these bits default to 0).

Signed-off-by: Sean Anderson <sean.anderson@seco.com>