- Aug 26, 2021
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T Karthik Reddy authored
As per SD spec when SD host controller is reset, it takes 1000msec to detect the card state. In case, if we enable the sd bus voltage & card detect state is not stable, then host controller will disable the sd bus voltage. In case of warm/subsystem reboot, due to unstable card detect state host controller is disabling the sd bus voltage to sd card causing sd card timeout error. So we wait for a maximum of 1000msec to get the card detect state stable before we enable the sd bus voltage. This current fix is workaround for now, this needs to be analysed further. Zynqmp platform should behave the same as Versal, but we did not encounter this issue as of now. So we are fixing it for Versal only. Signed-off-by:
T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by:
Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by:
Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Ashok Reddy Soma authored
Move tapdelay function calls to zynq_sdhci.c and make them static inline. zynqmp_tap_delay.h has function prototypes for the functions defined in tap_delays.c, which will not be needed anymore. Remove tap_delays.c and zynqmp_tap_delay.h files. Signed-off-by:
Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by:
Michal Simek <michal.simek@xilinx.com> Reviewed-by:
Jaehoon Chung <jh80.chung@samsung.com>
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Ashok Reddy Soma authored
Currently xilinx sdhci driver is using zynqmp_mmio_write() to set tapdelay values and DLL resets. Continue to use this for SPL and mini U-Boot where U-Boot will be executed at EL3 level. Use firmware call xilinx_pm_request() using appropriate arguments to set input/output tapdelays and also for DLL resets in regular flow(EL2). Host driver should explicitly request DLL reset before ITAP (assert DLL) and after OTAP (release DLL) to avoid issues in some cases. Also handle error return where possible. Signed-off-by:
T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by:
Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by:
Michal Simek <michal.simek@xilinx.com> Reviewed-by:
Jaehoon Chung <jh80.chung@samsung.com>
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- Aug 06, 2021
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T Karthik Reddy authored
Add enums for pm node id's, pm ioctl id's, tapdelay types, dll reset types Signed-off-by:
T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by:
Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Ashok Reddy Soma authored
set_delay() has return type as void. If there are any errors while setting tapdelay's it won't be able to return them. Change the prototype of set_delay() in sdhci_ops structure and return the errors from wherever it is called. Signed-off-by:
Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by:
Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Ashok Reddy Soma authored
Change return type of arasan_sdhci_set_tapdelay() to int, to facilitate returning errors. Get return values from input and output set clock phase functions inside arasan_sdhci_set_tapdelay() and return those errors. Signed-off-by:
T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by:
Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by:
Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
Add firmware based reset controller for Xilinx ZynqMP SoC to let other drivers to call reset functions. Driver is only tested on Xilinx ZynqMP but support for Xilinx Versal can be simply added. That's why reset_id and nr_reset are assigned in probe folder. Driver is inpired by driver from Linux kernel. Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
Enable RTC command to be able to check available. And also enable ZynqMP RTC driver to be possible to use by default. Here is the list when both drivers are enabled: ZynqMP> rtc list RTC #0 - rtc_emul RTC #1 - rtc@ffa60000 Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
The whole driver logic is taken from Linux kernel but only set/get/reset functions are implemented. When device is power off RTC is power out of battery. Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
RTCs are using sequence number defined in aliases node. Date command with DM_RTC enabled is looking for the first RTC with index 0. But when RTC_EMULATION is enabled it gets likely most of the time index 0 even when system has rtc0 device via aliases node and gets sequence number 0. That's why extend the code to look for sequence 0 number first. If this fails continue to use existing device with index 0. Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
RTCs are using aliases for sequences. That's why enable DM_UC_FLAG_SEQ_ALIAS for exact RTC indentification. The same flag is used by a lot of other uclasses like mmc, pci, serial, spi, timer, tpm, etc. Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
Based on discussion at https://lore.kernel.org/r/20200318125003.GA2727094@kroah.com we got recommendation to use explicit values for all enum values. The patch is following this recommendation. Signed-off-by:
Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/daeb67ded45d8a8f6a96717d1fb9c84439dd2ae8.1612361627.git.michal.simek@xilinx.com
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Michal Simek authored
The main reason for this to be implemented is capsule update. Two memories are supported and tested which is MMC FAT based and QSPI based. For creating capsule these commands are used: ./tools/mkeficapsule --raw spl/boot.bin --index 1 capsule1.bin ./tools/mkeficapsule --raw u-boot.itb --index 2 capsule2.bin Then transfer to SD card where these commands run: load mmc 0 10000000 capsule1.bin efidebug capsule update -v 10000000 load mmc 0 10000000 capsule2.bin efidebug capsule update -v 10000000 Depends on the boot device used are binaries loaded to qspi or mmc fat partition. Also multiboot register is handled to make sure that the same location(id) is used as image which is upgraded. Two locations are used by purpose for SPL flow. If only boot.bin is used create only one capsule. Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
This variable is pointing to offset is qspi where u-boot image is placed. In our case it is location of u-boot.itb file. Offset is the same as is used by Xilinx Zynq SoC. Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
When U-Boot runs in EL2 there is no access to csu_base registers that's why this has to be done via firmware interface to find out multi boot register value. Till now this function is called only from SPL in EL3. Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
Change multi_boot() to return multiboot value and move print out of this function and let this function to be used by other functions without duplicating message. Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
When env_set() is called there is no need to allocate memory for variable which is already saved that's why free it. Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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- Aug 05, 2021
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Tom Rini authored
- Assorted fixes
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- Aug 04, 2021
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Modified the help text of 'chpart' command ,mentioning that it is for MTD devices. Signed-off-by:
Adarsh Babu Kalepalli <opensource.kab@gmail.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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HELP description is provided for ‘configure’ sub-command of ‘blkcache’. Signed-off-by:
Adarsh Babu Kalepalli <opensource.kab@gmail.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Symbol CONFIG_SYS_ID_EEPROM is defined in include/configs/MPC8548CDS.h but never used. Remove it here and from the whitelist. Signed-off-by:
Heinrich Schuchardt <xypron.glpk@gmx.de>
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Tom Rini authored
Start out by documenting general expectations on when CI is run, how anyone can run Azure pipelines, and how GitLab CI pipelines can be run. Signed-off-by:
Tom Rini <trini@konsulko.com>
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In SquashFS, the contents of a directory is stored by squashfs_directory_entry structures which contain the file's name, inode and position within the filesystem. The inode number is not stored directly; instead each directory has one or more headers which set a base inode number, and files store the offset from that to the file's inode number. In mksquashfs, each inode is allocated a number in the same order as they are written to the directory table; thus the offset from the header's base inode number to the file's inode number is usually positive. Hardlinks are simply stored with two directory entries referencing the same file. This means the second entry will thus have an inode number much lower than the surrounding files. Since the header's base inode number comes from the first entry that uses the header, this delta will usually be negative. Previously, U-Boot's squashfs_directory_entry.inode_offset field was declared as an unsigned value. Thus when a negative value was found, it would either resolve to an invalid inode number or to that of an unrelated file. A squashfs image to test this can be created like so: echo hi > sqfs_test_files/001-root-file mkdir sqfs_test_files/002-subdir touch sqfs_test_files/002-subdir/003-file ln sqfs_test_files/{001-root-file,002-subdir/004-link} mksquashfs sqfs_test_files/ test.sqfs -noappend Note that squashfs sorts the files ASCIIbetacally, so we can use the names to control the order they appear in. The ordering is important - the first reference to the file must have a lower inode number than the directory in which the second reference resides, and the second reference cannot be the first file in the directory. Listing this sample image in U-Boot results in: => sqfsls virtio 2 002-subdir 0 003-file Inode not found. 0 004-link Signed-off-by:
Campbell Suter <campbell@snapit.group> Reviewed-by:
Miquel Raynal <miquel.raynal@bootlin.com>
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The "-E" option to mkimage generates a FIT with external data using the data-size and data-offset properties which must both be ignored when verifying a signature. Add "data-offset" to the list of excluded properties for signature verification; since the line is now too long, re-format the list to one-per-line and make it static since the data is constant. Signed-off-by:
John Keeping <john@metanate.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Tom Rini authored
The current stable release of LLVM is 12, update to that. While at it, fix that we had not correctly upgraded to LLVM 11 previously. Signed-off-by:
Tom Rini <trini@konsulko.com>
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- Aug 03, 2021
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https://source.denx.de/u-boot/custodians/u-boot-spiTom Rini authored
- SPI-NOR fix (Big Meng) - XMC XM25QH64C flash (Reto Schneider)
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The DT bindings of "jedec,spi-nor" [1] defines "m25p,fast-read" property to indicate that "fast read" opcode can be used to read data from the chip instead of the usual "read" opcode. If this property is not present in DT, mask out fast read in spi_nor_init_params(). This change mirrors the same logic in spi_nor_info_init_params() in drivers/mtd/spi-nor/core.c in the Linux kernel v5.14-rc3. [1] Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml in the kernel tree Signed-off-by:
Bin Meng <bmeng.cn@gmail.com> Reviewed-by:
Jagan Teki <jagan@amarulasolutions.com>
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The smart spi_nor_adjust_hwcaps() does not respect the SPI flash's hwcaps, and only looks to the controller on what can be supported. The flash's hwcaps needs to be AND'ed before checking. Fixes: 71025f01 ("mtd: spi-nor-core: Rework hwcaps selection") Signed-off-by:
Bin Meng <bmeng.cn@gmail.com> Reviewed-by:
Pratyush Yadav <p.yadav@ti.com> Reviewed-by:
Jagan Teki <jagan@amarulasolutions.com>
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When slave drivers don't set the max_read_size, the spi-mem should directly use data.nbytes and not limit to any size. But current logic will limit to the max_write_size. This commit mirrors the same changes in the dm version done in commit 535b1fdb ("spi: spi-mem: Fix read data size issue"). Signed-off-by:
Bin Meng <bmeng.cn@gmail.com> Reviewed-by:
Jagan Teki <jagan@amarulasolutions.com>
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This chip has been (briefly) tested on the MediaTek MT7688 based GARDENA smart gateway. Datasheet: http://xmcwh.com/Uploads/2020-12-17/XM25QH64C_Ver1.1.pdf Signed-off-by:
Reto Schneider <reto.schneider@husqvarnagroup.com> Reviewed-by:
Stefan Roese <sr@denx.de> Reviewed-by:
Jagan Teki <jagan@amarulasolutions.com>
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https://source.denx.de/u-boot/custodians/u-boot-x86Tom Rini authored
- Fixed broken ICH SPI driver in software sequencer mode - Added "m25p,fast-read" to SPI flash node for x86 boards - Drop ROM_NEEDS_BLOBS and BUILD_ROM for x86 ROM builds - Define a default TSC timer frequency for all x86 boards - x86 MTRR MSR programming codes bug fixes - x86 "hob" command bug fixes - Don't program MTRR for DRAM for FSP1 - Move INIT_PHASE_END_FIRMWARE to FSP2 - Use external graphics card by default on Intel Crown Bay - tangier: Fix DMA controller IRQ polarity in CSRT
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- Aug 02, 2021
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Tom Rini authored
- Merge in a series that cleans up and makes more consistent how we deal with numeric input on the CLI. This saves a few bytes in a lot of places.
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U-Boot mostly uses hex for value input, largely because addresses are much easier to understand in hex. But in some cases a decimal value is requested, such as where the value is small or hex does not make sense in the context. In these cases it is sometimes useful to be able to provide a hex value in any case, if only to resolve any ambiguity. Add this functionality, for increased flexibility. Signed-off-by:
Simon Glass <sjg@chromium.org>
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Mention the default base of U-Boot in the command-line section. Add examples for decimal and octal. Signed-off-by:
Simon Glass <sjg@chromium.org>
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Take this part of the README and put it into rST format. Signed-off-by:
Simon Glass <sjg@chromium.org>
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The code to convert a character into a digit is repeated twice in this file. Factor it out into a separate function. This also makes the code a little easier to read. Signed-off-by:
Simon Glass <sjg@chromium.org>
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This function support decoding octal but no tests are included yet. Add some. Signed-off-by:
Simon Glass <sjg@chromium.org>
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Add some tests that check the behaviour of this function. These are the same as for simple_strtoul() but with a few longer values. Signed-off-by:
Simon Glass <sjg@chromium.org>
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If we see 0x then we can assume this is the start of a hex value. It does not seem necessary to check for a hex digit after that since it will happen when parsing the value anyway. Drop this check to simplify the code and reduce size. Add a few more test cases for when a 0x prefix is used. Signed-off-by:
Simon Glass <sjg@chromium.org>
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