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xilinx-for-v2021.01-rc3
Xilinx changes for v2021.01-rc3 Microblaze: - Enable GC - Get rid of xparameters.h and switch to DT for CFI - Fix config file tpm: - Fix TPM code zynqmp: - Enable TPM by default - Remove unused macros fru: - Several fixes especially use limit for recording
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xilinx-for-v2021.01-v2
Xilinx changes for v2021.01-v2 common: - Add support for 64bit loadables from SPL xilinx: - Update documentation and record ownership - Enable eeprom board detection based legacy and fru formats - Add support for FRU format microblaze: - Optimize low level ASM code - Enable SPI/I2C - Enable distro boot zynq: - Add support for Zturn V5 zynqmp: - Improve silicon detection code - Enable several kconfig options - Align DT with the latest state - Enabling security commands - Enable and support FPGA loading from SPL - Optimize xilinx_pm_request() calling versal: - Some DTs/Kconfig/defconfig alignments - Add binding header for clock and power zynq-sdhci: - Add support for tap delay programming zynq-spi/zynq-qspi: - Use clock framework for getting clocks xilinx-spi: - Fix some code issues (unused variables) serial: - Check return value from clock functions in pl01x