- Oct 07, 2021
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https://source.denx.de/u-boot/custodians/u-boot-riscvTom Rini authored
- Reset improvements, enable coherence manager on ae350, k210 clk improvements, other fixes
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Leo Yu-Chi Liang authored
If Coherence Manager were not set in the beginning, u-boot-spl would sometimes fail to boot to u-boot proper. Enable CM and I/D cache at the same time in harts_early_init Signed-off-by:
Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by:
Rick Chen <rick@andestech.com>
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Heinrich Schuchardt authored
There should be a platform compiled with the new driver. Enable CONFIG_SYSRESET_SBI for all QEMU boards using SBI. If you want to test the SBI sysreset driver, disable CONFIG_SYSRESET_SYSCON. Signed-off-by:
Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by:
Leo Yu-Chi Liang <ycliang@andestech.com>
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Heinrich Schuchardt authored
Provide sysreset driver using the SBI system reset extension. Signed-off-by:
Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by:
Sean Anderson <seanga2@gmail.com> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com> Tested-by:
Samuel Holland <samuel@sholland.org>
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Heinrich Schuchardt authored
Use constants for extension IDs. Signed-off-by:
Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by:
Sean Anderson <seanga2@gmail.com> Reviewed-by:
Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com>
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Heinrich Schuchardt authored
Add the System Reset Extension and the Hart State Management Extension definitions. Add missing RFENCE Extension enum values. The SBI 0.1 extension constants are needed for the sbi command. Remove an #ifdef. Cf. https://github.com/riscv/riscv-sbi-doc/blob/master/riscv-sbi.adoc Signed-off-by:
Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by:
Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by:
Sean Anderson <seanga2@gmail.com> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com>
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Samuel Holland authored
bootm_low is used as a base address is used to allocate space for the FDT blob, initrd, cmdline, etc. when booting Linux. Set the default value for RISC-V to the start of the first DRAM bank, so platforms can get their DRAM layout from the device tree, and do not need to define CONFIG_SYS_SDRAM_BASE. Signed-off-by:
Samuel Holland <samuel@sholland.org> Reviewed-by:
Leo Yu-Chi Liang <ycliang@andestech.com>
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Samuel Holland authored
The no-map property is wrongly skipped if a no-map reserved memory node follows one without that property. Fix this by not remembering the absence of a no-map property across loop iterations. Fixes: d4ea649f ("riscv: Provide a mechanism to fix DT for reserved memory") Signed-off-by:
Samuel Holland <samuel@sholland.org> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com> Reviewed-by:
Rick Chen <rick@andestech.com> Reviewed-by:
Atish Patra <atish.patra@wdc.com>
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Samuel Holland authored
The RISC-V SBI interface v0.1 provides a function for printing a character to the console. Even though SBI v0.1 functions are deprecated, the SBI console is quite useful for early debugging, because it works without any dcache, memory, or MMIO access in S mode. Signed-off-by:
Samuel Holland <samuel@sholland.org> Reviewed-by:
Sean Anderson <seanga2@gmail.com> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com>
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Sean Anderson authored
In some cases, the best config cannot be used because the VCO would be out-of-spec. In these cases, we may need to try a worse combination of r/od in order to find the best representable config. This also adds a few test cases to catch this and other (possible) unlikely errors. Signed-off-by:
Sean Anderson <seanga2@gmail.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Sean Anderson authored
Having to copy-paste the same 3 lines makes adding new test cases error-prone. Use a macro. Signed-off-by:
Sean Anderson <seanga2@gmail.com> Reviewed-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Leo Yu-Chi Liang <ycliang@andestech.com>
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Sean Anderson authored
Everything here sits in a while (true) loop. However, this introduces a couple of layers of indentation. We can simplify the code by introducing a single goto instead of using continue/break. This will also make adding loops in the next patch easier. Signed-off-by:
Sean Anderson <seanga2@gmail.com> Reviewed-by:
Leo Yu-Chi Liang <ycliang@andestech.com>
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Sean Anderson authored
The PLL functions take ulong arguments for rate, but still check if that rate is negative (which is never true). The correct way to handle this is to use IS_ERR_VALUE (like is already done in k210_clk_set_rate). While we're at it, we can move the error checking up into the caller of the pll set/get rate functions. This also protects our other calculations from using bogus values for rate. Fixes: 609bd60b ("clk: k210: Rewrite to remove CCF") Reported-by:
Coverity Scan <scan-admin@coverity.com> Signed-off-by:
Sean Anderson <seanga2@gmail.com> Reviewed-by:
Leo Yu-Chi Liang <ycliang@andestech.com>
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- Oct 06, 2021
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Tom Rini authored
- Use better values for ACPI OEM_VERSION - Assorted NAND related Kconifg migrations and another dependency fix
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Tom Rini authored
The values of CONFIG_NAND_OMAP_ECCSCHEME map to the enum in include/linux/mtd/omap_gpmc.h for valid ECC schemes. Make which one we will use be a choice statement, enumerating the ones which we have implemented. Signed-off-by:
Tom Rini <trini@konsulko.com>
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Tom Rini authored
This converts the following to Kconfig: CONFIG_SYS_NAND_U_BOOT_LOCATIONS CONFIG_SYS_NAND_U_BOOT_OFFS Signed-off-by:
Tom Rini <trini@konsulko.com>
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Tom Rini authored
This converts the following to Kconfig: CONFIG_NAND_FSL_ELBC CONFIG_NAND_FSL_IFC Note that a number of PowerPC platforms had previously enabled CONFIG_NAND_FSL_ELBC without CONFIG_MTD_RAW_NAND, and now they no longer enable the option, reducing the size of a few functions. Signed-off-by:
Tom Rini <trini@konsulko.com>
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Tom Rini authored
This converts the following to Kconfig: CONFIG_SYS_NAND_MAX_CHIPS Signed-off-by:
Tom Rini <trini@konsulko.com>
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Tom Rini authored
We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by:
Tom Rini <trini@konsulko.com>
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Tom Rini authored
This converts the following to Kconfig: CONFIG_SYS_NAND_ONFI_DETECTION Signed-off-by:
Tom Rini <trini@konsulko.com>
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Tom Rini authored
This converts the following to Kconfig: CONFIG_SYS_NAND_5_ADDR_CYCLE Signed-off-by:
Tom Rini <trini@konsulko.com>
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Tom Rini authored
This converts the following to Kconfig: CONFIG_SYS_NAND_BAD_BLOCK_POS In order to do this, introduce a choice for HAS_LARGE/SMALL_BADBLOCK_POS as those are the only valid values. Use LARGE as the default as no in-tree boards use SMALL, but it is possible. Signed-off-by:
Tom Rini <trini@konsulko.com>
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Tom Rini authored
This code is unused, drop it. Signed-off-by:
Tom Rini <trini@konsulko.com>
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Tom Rini authored
This converts the following to Kconfig: CONFIG_SYS_NAND_PAGE_COUNT Signed-off-by:
Tom Rini <trini@konsulko.com>
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Tom Rini authored
This converts the following to Kconfig: CONFIG_SPL_NAND_LOAD CONFIG_SYS_NAND_BLOCK_SIZE CONFIG_SYS_NAND_PAGE_SIZE CONFIG_SYS_NAND_OOBSIZE Signed-off-by:
Tom Rini <trini@konsulko.com>
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Tom Rini authored
This converts the following to Kconfig: CONFIG_NAND_LPC32XX_MLC Signed-off-by:
Tom Rini <trini@konsulko.com>
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Tom Rini authored
Typically platforms will define CONFIG_SYS_NAND_PAGE_COUNT based on CONFIG_SYS_NAND_BLOCK_SIZE / CONFIG_SYS_NAND_PAGE_SIZE. Switch to this in preparation for migrating CONFIG_SYS_NAND namespace to Kconfig. Cc: Marek Vasut <marex@denx.de> Cc: Olaf Mandel <o.mandel@menlosystems.com> Signed-off-by:
Tom Rini <trini@konsulko.com>
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Tom Rini authored
These platforms do not currently enable NAND, remove these references. Cc: Kever Yang <kever.yang@rock-chips.com> Signed-off-by:
Tom Rini <trini@konsulko.com>
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SPL_RSA_VERIFY requires SPL_RSA to be enabled. Add correct dependency. Signed-off-by:
Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
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OEM_REVISION is 32-bit unsigned number. It should be increased only when changing software version. Therefore it should not depend on build time. Change calculation to use U-Boot version numbers and set this revision to date number. Prior this change OEM_REVISION was calculated from build date and stored in the same format. After this change macro U_BOOT_BUILD_DATE is not used in other files so remove it from global autogenerated files and also from Makefile. Signed-off-by:
Pali Rohár <pali@kernel.org> Reviewed-by:
Simon Glass <sjg@chromium.org>
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- Oct 05, 2021
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Tom Rini authored
- Assorted OPTEE cleanups - pinctrl, gpio improvements, assorted livetree migrations - Assorted pytest improvements
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Use dev_ function to support a live tree. Signed-off-by:
Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Use dev_ function to read the sides and colour to support a live tree. Signed-off-by:
Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Use dev_ function to read the name and boolean to support a live tree. Signed-off-by:
Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Add documentation for this so people can try it out. At present it does not fully work. Signed-off-by:
Simon Glass <sjg@chromium.org>
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These tests currently run in a particular sequence, with some of them depending on the actions of earlier tests. Add a check for sandbox and reset to a known state at the start of each test, so that all tests can run in parallel. Signed-off-by:
Simon Glass <sjg@chromium.org>
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The -z tests don't really need to be part of the main set. Separate them out so we can drop the test setup/cleans functions and thus run all tests in parallel. Signed-off-by:
Simon Glass <sjg@chromium.org>
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Update the tests to use separate working directories, so we can run them in parallel. It also makes it possible to see the individual output files after the tests have completed. Signed-off-by:
Simon Glass <sjg@chromium.org>
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Target code and mkimage share the same hashing infrastructure. If one is wrong, it's very likely that both are wrong in the same way. Thus testing won't catch hash regressions. This already happened in commit 92055e13 ("image: Drop if/elseif hash selection in calculate_hash()"). None of the tests caught that CRC32 was broken. Instead of testing hash_calculate() against itself, create a FIT with containing a kernel with pre-calculated hashes. Then check the hashes produced against the known good hashes. Signed-off-by:
Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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The generic GPIO flags binding is shared across many drivers, some of which need their own xlate function. Factor out the flag translation code from gpio_xlate_offs_flags so it does not need to be duplicated. Signed-off-by:
Samuel Holland <samuel@sholland.org> Reviewed-by:
Simon Glass <sjg@chromium.org>
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