- Apr 15, 2020
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Add management of property "reg" to configure @ of phy and also "max-speed" property to specify maximum speed in Mbit/s supported by the device Signed-off-by:
Christophe Roullier <christophe.roullier@st.com> Reviewed-by:
Patrick DELAUNAY <patrick.delaunay@st.com> Signed-off-by:
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Add management of property "reset-gpios" in the node identified by "phy-handle" to configure any GPIO used to reset the PHY. Signed-off-by:
Patrice CHOTARD <patrice.chotard@st.com> Reviewed-by:
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- Apr 14, 2020
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git://git.denx.de/u-boot-marvellTom Rini authored
- Misc enhancements to Clearfog, including board variant detection (Joel) - Misc enhancements to Turris Mox, including generalization of the ARMADA37xx DDR size detection (Marek)
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Use the new a3700_fdt_fix_pcie_regions function in turris_mox.c so that MOX boards with 4 GB RAM are fully supported. Signed-off-by:
Marek Behún <marek.behun@nic.cz> Reviewed-by:
Stefan Roese <sr@denx.de>
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In case when ARM Trusted Firmware changes the default address of PCIe regions (which can be done for devices with 4 GB RAM to maximize the amount of RAM the device can use) we add code that looks at how ATF changed the PCIe windows in the CPU Address Decoder and changes given device-tree blob accordingly. Signed-off-by:
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In order to support MOX boards with 2 GB or 4 GB RAM, we use the new Armada-3700 generic code for memory information structures. This is done by removing dram_init and dram_init_banksize from turris_mox.c, in order for the generic, weak definitions to be used. Also for boards with 4 GB RAM it is needed to increase CONFIG_NR_DRAM_BANKS to 2 in turris_mox_defconfig. Signed-off-by:
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Currently on Armada-37xx the mem_map structure is statically defined to map first 2 GB of memory as RAM region, and system registers and PCIe region device region. This is insufficient for when there is more RAM or when for example the PCIe windows is mapped to another address by the CPU Address Decoder. In the case when the board has 4 GB RAM, on some boards the ARM Trusted Firmware can move the PCIe window to another address, in order to maximize possible usable RAM. Also the dram_init and dram_init_banksize looks for information in device-tree, and therefore different device trees are needed for boards with different RAM sizes. Therefore we add code that looks at how the ARM Trusted Firmware has configured the CPU Address Decoder windows, and then we update the mem_map structure and compute gd->ram_size and gd->bd->bi_dram bank base addresses and sizes accordingly. Signed-off-by:
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Move Armada-8k specific DRAM init code into armada-8k specific directory. Signed-off-by:
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Sort #includes alphabetically, the only exception is common.h, which is included first in most parts of U-Boot. Signed-off-by:
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Use macro MVEBU_REGISTER to access register addresses instead of hardcoded addresses. Signed-off-by:
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Commit e8e9715d requires the USB3 regulator node to have the enable-active-high property for the regulator to work properly. The GPIO_ACTIVE_HIGH constant is not enough anymore. Signed-off-by:
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Patch Linux's device tree according to which Mox modules are connected. Linux's device tree has all possible Mox module nodes preprogrammed, but in disabled state. If MOX B, MOX F or MOX G module is present, this code enables the PCI node. For the network modules (MOX C, MOX D and MOX E) are present, the code enables corresponding ethernet and swtich nodes and DSA connections. For the SFP cage the SFP GPIO controller node and SFP node are also enabled. Signed-off-by:
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With recent changes to the mmc subsystem (chip detect code etc) update the sdhci node of the Turris Mox device tree. Signed-off-by:
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The SPI clock signal changes value when the SPI configuration register is configured. This can sometimes lead to the device misinterpreting the enablement of the SPI controller as actual clock tick. This can be solved by first setting the SPI CS1 pin from GPIO to SPI mode, and only after that writing the SPI configuration register. Signed-off-by:
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Switch to explicitly using the Pro variant DT, which has been available since Linux 4.11. Signed-off-by:
Joel Johnson <mrjoel@lixil.net> Reviewed-by:
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Migrate the values for ENV_SIZE and ENV_OFFSET into board specific Kconfig defaults so they're more accessible for configuration. Signed-off-by:
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Add reasonable default SPI offsets and ENV size when configured to boot from SPI flash. Signed-off-by:
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Unify the location of DT selection into board_late_init instead of split between detection and static configuration paths. Signed-off-by:
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The mPCIe slots on ClearFog Pro and ClearFog Base may be alternately configured for SATA usage. Signed-off-by:
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While newer Linux kernels provide autoconfiguration of SFP, provide an option for setting in U-Boot Kconfig for use prior to booting. Signed-off-by:
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Add a unique entry for ClearFog Base variant, reflected in the board name and adjusted SerDes topology. Signed-off-by:
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Make the board version printed indicate the Pro variant default. Also adjust static name casing to match what is expected for EEPROM product name to share string constants. Signed-off-by:
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Using a consistent hardcoded MAC address from the DTS file causes issues when using multiple devices on the same network segment. Instead rely on environment configuration or random generation. Signed-off-by:
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Tested on Solidrun ClearFog Base. Table alignment was: | Lane # | Speed | Type | -------------------------------- | 0 | 3 | SATA0 | | 1 | 0 | SGMII1 | | 2 | 3 | SATA1 | | 3 | 5 | USB3 HOST1 | | 4 | 5 | USB3 HOST0 | | 5 | 4 | SGMII2 | -------------------------------- After the change, it's correctly aligned as: | Lane # | Speed | Type | -------------------------------- | 0 | 3 | SATA0 | | 1 | 0 | SGMII1 | | 2 | 5 | PCIe1 | | 3 | 5 | USB3 HOST1 | | 4 | 5 | PCIe2 | | 5 | 0 | SGMII2 | -------------------------------- Signed-off-by:
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Enable distro bootcmd support for additional SATA ports if enabled. Signed-off-by:
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Include attempting to boot from SCSI (SATA) devices within generated board distro bootcmd environment. The reasoning for boot ordering is that MMC and USB are external and removable, while when a case is in use, replacing M.2 or mSATA drives requires disassembly. Therefore, to boot SCSI, [bootable] external media must be removed. If SCSI were placed before MMC or USB, then removing a bootable SCSI drive to enable MMC or USB booting would be more difficult. Signed-off-by:
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Update the RTC (Read Timing Control) values for PCIe memory wrappers following an ERRATA (ERRATA# TDB). This means the PCIe accesses will used slower memory Read Timing, to allow more efficient energy consumption, in order to lower the minimum VDD of the memory. Will lead to more robust memory when voltage drop occurs (VDDSEG) The code is based on changes from Marvell's U-Boot, specifically: https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/20cd2704072512de176e048970f2883db901674b https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/eb608a7c8dd0d42b87601a61b9c0cc5615ab94b2 https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/c4af19ae2bf08cf6e450e741ce4f04d402a5cb6b Signed-off-by:
Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by:
Chris Packham <judge.packham@gmail.com> Reviewed-by:
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Support for sata devices via the scsi command is available and already enabled by default for the Clearfog Base and Pro. This change adds scsi to the list of boot targets used by distro-boot. Signed-off-by:
Josua Mayer <josua@solid-run.com> Cc: Stefan Roese <sr@denx.de> Reviewed-by:
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The value of local variable ecc is immediately overwritten. So we can remove the first assignment. Signed-off-by:
Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by:
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Sort the Armada series dts in the Makefile alphabetically prior to adding new board support. Signed-off-by:
Josip Kelečić <josip.kelecic@sartura.hr> Reviewed-by:
Luka Kovacic <luka.kovacic@sartura.hr> Reviewed-by:
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For some layouts it is necessary to adjust the CK_DELAY parameter to successfully complete DDR training. Add the ability to specify the CK_DELAY in the mv_ddr_topology_map. Signed-off-by:
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- Apr 13, 2020
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git://git.denx.de/u-boot-socfpgaTom Rini authored
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git://git.denx.de/u-boot-usbTom Rini authored
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Tom Rini authored
Pull in changes that have been pending in our 'next' branch. This includes: - A large number of CI improvements including moving to gcc-9.2 for all platforms. - amlogic, xilinx, stm32, TI SoC updates - USB and i2c subsystem updtaes - Re-sync Kbuild/etc logic with v4.19 of the Linux kernel. - RSA key handling improvements
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Tom Rini authored
Signed-off-by:Tom Rini <trini@konsulko.com>
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Adding "u-boot,dm-pre-reloc" and enable CONFIG_SPL_CACHE to enable cache driver in SPL. This fixed error below in SPL: cache controller driver NOT found! Signed-off-by:Ley Foon Tan <ley.foon.tan@intel.com>
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Update these 3 files from Linux:. - socfpga_arria10.dtsi (Commit ID c1459a9d7e92) - socfpga_arria10_socdk.dtsi (Commit ID d9b9f805ee2b) - socfpga_arria10_socdk_sdmmc.dts (Commit ID 17808d445b6f) Change in socfpga_arria10.dtsi: - Add clkmgr label, so that can reference to it in u-boot.dtsi. Change in socfpga_arria10-u-boot.dtsi: - Add compatible and altr,sysmgr-syscon for uboot. Signed-off-by: -
Move Uboot specific properties to *u-boot.dtsi files. Preparation to sync Arria 10 device tree from Linux. Signed-off-by: -
Marek Vasut authored
Add and enable RTC-backed boot counter on ABB SECU1 platform. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Ley Foon Tan <ley.foon.tan@intel.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by:
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Rayagonda Kokatanur authored
Base driver for Broadcom xHCI controllers Signed-off-by:
Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com> Signed-off-by:
Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Signed-off-by:
Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>
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