- Aug 04, 2023
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This adds initial support for the Toradex Verdin AM62 Quad 1GB WB IT V1.0A module and subsequent V1.1 launch configuration SKUs. They are strapped to boot from their on-module eMMC. U-Boot supports booting from the on-module eMMC only, DFU support is disabled for now due to missing AM62x USB support. The device trees were taken straight from Linux v6.5-rc1. Boot sequence is: SYSFW ---> R5 SPL (both in tiboot3.bin) ---> ATF (TF-A) ---> OP-TEE ---> A53 SPL (part of tispl.bin) ---> U-boot proper (u-boot.img) Signed-off-by:
Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by:
Nishanth Menon <nm@ti.com>
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- Aug 03, 2023
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With the previous updates to the device tree, Ten64 can use Standard Boot 'out of the box'. Signed-off-by:
Mathew McBride <matt@traverse.com.au> Reviewed-by:
Peng Fan <peng.fan@nxp.com>
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The watchdog driver was previously enabled but not used until U-Boot's fsl-ls1088a.dtsi was updated to describe them. Some Linux distributions (e.g Debian 11) do not engage the SP805 watchdogs, causing unexpected resets after boot. To conserve the user experience, turn off the autostart, and we will provide a mechanism to turn them on at boot via env vars. Signed-off-by:
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This restores NVMe functionality after PCI(e) NVMe support was split out from the NVMe driver. Signed-off-by:
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This patch adds general board files based on MT7988 SoCs. MT7988 uses one mmc controller for booting from both SD and eMMC, and the pins of mmc controller booting from SD are also shared with one of spi controllers. So two configs are need for these boot types: 1. mt7988_rfb_defconfig - SPI-NOR, SPI-NAND and eMMC 2. mt7988_sd_rfb_defconfig - SPI-NAND and SD Signed-off-by:Weijie Gao <weijie.gao@mediatek.com>
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- Aug 02, 2023
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Heinrich Schuchardt authored
The Unmatched board is typically booted from NVMe which requires PCI. When dropping to a console PCI is not initialized yet. 'pci enum' has to be called. Change the configuration to call pci_init() in board_init_r(). Signed-off-by:
Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by:
Rick Chen <rick@andestech.com>
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Minda Chen authored
Add PCIe device rtl8169 net adapter driver support. Signed-off-by:
Minda Chen <minda.chen@starfivetech.com> Reviewed-by:
Leo Yu-Chi Liang <ycliang@andestech.com>
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Mason Huo authored
Add PCIe host driver and nvme driver in configure file. Signed-off-by:
Mason Huo <mason.huo@starfivetech.com> Signed-off-by:
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- Jul 31, 2023
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Radxa E25 is a network application carrier board for the Radxa CM3I SoM with a RK3568 SoC. It features dual 2.5G ethernet, mini PCIe, M.2 B Key, USB3, eMMC, SD, nano SIM card slot and a 26-pin GPIO header. Features tested on a Radxa E25 v1.4: - SD-card boot - eMMC boot - USB host - PCIe/Ethernet adapters is detected - SATA Device tree is imported from linux next-20230728. Signed-off-by:
Jonas Karlman <jonas@kwiboo.se> Reviewed-by:
Kever Yang <kever.yang@rock-chips.com> Tested-by:
FUKAUMI Naoki <naoki@radxa.com>
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Enable USB2PHY for all RK3328 boards. => usb start starting USB... Bus usb@ff5c0000: USB EHCI 1.00 Bus usb@ff5d0000: USB OHCI 1.0 Bus usb@ff600000: generic_phy_get_bulk : no phys property Register 2000140 NbrPorts 2 Starting the controller USB XHCI 1.10 Bus usb@ff580000: USB DWC2 scanning bus usb@ff5c0000 for devices... 2 USB Device(s) found scanning bus usb@ff5d0000 for devices... 1 USB Device(s) found scanning bus usb@ff600000 for devices... 2 USB Device(s) found scanning bus usb@ff580000 for devices... 2 USB Device(s) found scanning usb for storage devices... 2 Storage Device(s) found => usb tree USB device tree: 1 Hub (480 Mb/s, 0mA) | u-boot EHCI Host Controller | +-2 Mass Storage (480 Mb/s, 500mA) TS-RDF5A Transcend 000000000009 1 Hub (12 Mb/s, 0mA) U-Boot Root Hub 1 Hub (5 Gb/s, 0mA) | U-Boot XHCI Host Controller | +-2 Mass Storage (5 Gb/s, 224mA) SanDisk Dual Drive 040130e3ee554b7078843f4eb331646 1 Hub (480 Mb/s, 0mA) | U-Boot Root Hub | +-2 Human Interface (12 Mb/s, 98mA) Logitech USB Receiver => dm tree -s Class Index Probed Driver Name ----------------------------------------------------------- syscon 1 [ + ] syscon |-- syscon@ff450000 phy 0 [ + ] rockchip_usb2phy | `-- usb2phy@100 clk 2 [ + ] rockchip_usb2phy_clo | |-- usb480m_phy phy 1 [ + ] rockchip_usb2phy_por | |-- otg-port phy 2 [ + ] rockchip_usb2phy_por | `-- host-port sysinfo 0 [ + ] sysinfo_smbios |-- smbios usb 3 [ + ] dwc2_usb |-- usb@ff580000 usb_hub 3 [ + ] usb_hub | `-- usb_hub usb_dev_ge 0 [ + ] usb_dev_generic_drv | `-- generic_bus_3_dev_2 usb 0 [ + ] ehci_generic |-- usb@ff5c0000 usb_hub 0 [ + ] usb_hub | `-- usb_hub usb_mass_s 0 [ + ] usb_mass_storage | `-- usb_mass_storage blk 2 [ + ] usb_storage_blk | |-- usb_mass_storage.lun0 partition 4 [ + ] blk_partition | | |-- usb_mass_storage.lun0:1 partition 5 [ + ] blk_partition | | `-- usb_mass_storage.lun0:2 bootdev 3 [ ] usb_bootdev | `-- usb_mass_storage.lun0.bootdev usb 1 [ + ] ohci_generic `-- usb@ff5d0000 usb_hub 1 [ + ] usb_hub `-- usb_hub Cc: Tianling Shen <cnsztl@gmail.com> Cc: David Bauer <mail@david-bauer.net> Cc: Loic Devulder <ldevulder@suse.com> Cc: Chen-Yu Tsai <wens@csie.org> Cc: Banglang Huang <banglang.huang@foxmail.com> Cc: Matwey V. Kornilov <matwey.kornilov@gmail.com> Signed-off-by:Jagan Teki <jagan@amarulasolutions.com> Reviewed-by:
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Enable USB 3.0 in all RK3328 boards. => usb start starting USB... Bus usb@ff5c0000: ehci_generic usb@ff5c0000: Failed to get clocks (ret=-19) Port not available. Bus usb@ff5d0000: USB OHCI 1.0 Bus usb@ff600000: Register 2000140 NbrPorts 2 Starting the controller USB XHCI 1.10 Bus usb@ff580000: 1 USB Device(s) found scanning usb for storage devices... 1 Storage Device(s) found => usb tree USB device tree: 1 Hub (12 Mb/s, 0mA) U-Boot Root Hub 1 Hub (5 Gb/s, 0mA) | U-Boot XHCI Host Controller | +-2 Mass Storage (5 Gb/s, 224mA) SanDisk Dual Drive 040130e3ee554b7078843f4eb331646 1 Hub (480 Mb/s, 0mA) U-Boot Root Hub Cc: Tianling Shen <cnsztl@gmail.com> Cc: David Bauer <mail@david-bauer.net> Cc: Loic Devulder <ldevulder@suse.com> Cc: Chen-Yu Tsai <wens@csie.org> Cc: Banglang Huang <banglang.huang@foxmail.com> Cc: Matwey V. Kornilov <matwey.kornilov@gmail.com> Signed-off-by: -
Driver support for rk3328 is not supported so drop this unused XHCI_DWC3. Cc: Tianling Shen <cnsztl@gmail.com> Cc: David Bauer <mail@david-bauer.net> Cc: Loic Devulder <ldevulder@suse.com> Cc: Chen-Yu Tsai <wens@csie.org> Cc: Banglang Huang <banglang.huang@foxmail.com> Cc: Matwey V. Kornilov <matwey.kornilov@gmail.com> Signed-off-by:
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There is an Errata with the built-in I2C controller where various I2C hardware errors cause a complete lockup of the CPU (which eventually results in an watchdog reset). Put the I2C MPP pins into GPIO mode and use the i2c-gpio driver instead. This uses a bit-banged implementation of an I2C controller and avoids triggering the Errata. Signed-off-by:
Chris Packham <judge.packham@gmail.com> Reviewed-by:
Stefan Roese <sr@denx.de>
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ROCK 5A is a Rockchip RK3588S based SBC (Single Board Computer) by Radxa. There are tree variants depending on the DRAM size : 4G, 8G and 16G. Specifications: Rockchip Rk3588S SoC 4x ARM Cortex-A76, 4x ARM Cortex-A55 4/8/16GB memory LPDDR4x Mali G610MC4 GPU MIPI CSI 2 multiple lanes connector 4-lane MIPI DSI connector Audio – 3.5mm earphone jack eMMC module connector uSD slot (up to 128GB) 2x USB 2.0, 2x USB 3.0 2x micro HDMI 2.1 ports, one up to 8Kp60, the other up to 4Kp60 Gigabit Ethernet RJ45 with optional PoE support 40-pin IO header including UART, SPI, I2C and 5V DC power in USB PD over USB Type-C Size: 85mm x 56mm (Raspberry Pi 4 form factor) Kernel commits: d1824cf95799 ("arm64: dts: rockchip: Add rock-5a board") 991f136c9f8d ("arm64: dts: rockchip: Update sdhci alias for rock-5a") 304c8a759953 ("arm64: dts: rockchip: Remove empty line from rock-5a") cda0c2ea65a0 ("arm64: dts: rockchip: Fix RX delay for ethernet phy on rk3588s-rock5a") Signed-off-by:Eugen Hristev <eugen.hristev@collabora.com> Reviewed-by:
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The commit fd6e425b ("rockchip: rk3588-rock-5b: Enable boot from SPI NOR flash") enabled SPI flash support by adding a spi0 alias. Correct this by adding spi0-spi5 aliases in rk3588s-u-boot.dtsi and SF_DEFAULT_BUS=5 and SPL_DM_SEQ_ALIAS=y in defconfig. Also enabled support for parsing and auto discovery of parameters, SFDP. Fixes: fd6e425b ("rockchip: rk3588-rock-5b: Enable boot from SPI NOR flash") Signed-off-by:
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The commit 64f79f88 ("rockchip: rk3568-rock-3a: Enable boot from SPI NOR flash") enabled SPI flash support by overriding the spi0 alias. Correct this by adding a new spi4 alias in rk356x-u-boot.dtsi and SF_DEFAULT_BUS=4 and SPL_DM_SEQ_ALIAS=y in defconfig. Also enabled support for parsing and auto discovery of parameters, SFDP. Fixes: 64f79f88 ("rockchip: rk3568-rock-3a: Enable boot from SPI NOR flash") Signed-off-by:
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TPL max size is limited to 184 KB, SPL is loaded to 0x0 and TF-A is loaded to 0x40000, this limit SPL max size to 256 KB. With BootRom only reading first 2 KB per 4 KB page of SPI flash, 880 KB may be needed for TPL+SPL in a worst-case scenario. (184 KB + 256 KB) x 2 = 880 KB Use 0xE0000 (896 KB) as the payload offset in SPI flash, this allows for a payload of 3168 KB before env offset start to overlap. Also add CONFIG_ROCKCHIP_SPI_IMAGE=y to build a bootable SPI flash image, u-boot-rockchip-spi.bin. Signed-off-by:
Quentin Schulz <foss+u-boot@0leil.net> Reviewed-by:
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TPL max size is limited to 184 KB, SPL is loaded to 0x0 and TF-A is loaded to 0x40000, this limit SPL max size to 256 KB. With BootRom only reading first 2 KB per 4 KB page of SPI flash, 880 KB may be needed for TPL+SPL in a worst-case scenario. (184 KB + 256 KB) x 2 = 880 KB Use 0xE0000 (896 KB) as the payload offset in SPI flash, this allows for a payload of 3168 KB before env offset start to overlap. Also add CONFIG_ROCKCHIP_SPI_IMAGE=y to build a bootable SPI flash image, u-boot-rockchip-spi.bin. Signed-off-by:
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TPL max size is limited to 184 KB, SPL is loaded to 0x0 and TF-A is loaded to 0x40000, this limit SPL max size to 256 KB. With BootRom only reading first 2 KB per 4 KB page of SPI flash, 880 KB may be needed for TPL+SPL in a worst-case scenario. (184 KB + 256 KB) x 2 = 880 KB Use 0xE0000 (896 KB) as the payload offset in SPI flash, this allows for a payload of 3168 KB before env offset start to overlap. Also add CONFIG_ROCKCHIP_SPI_IMAGE=y to build a bootable SPI flash image, u-boot-rockchip-spi.bin. Signed-off-by:
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TPL max size is limited to 184 KB, SPL is loaded to 0x0 and TF-A is loaded to 0x40000, this limit SPL max size to 256 KB. With BootRom only reading first 2 KB per 4 KB page of SPI flash, 880 KB may be needed for TPL+SPL in a worst-case scenario. (184 KB + 256 KB) x 2 = 880 KB Use 0xE0000 (896 KB) as the payload offset in SPI flash, this allows for a payload of 3168 KB before env offset start to overlap. Also remove CONFIG_LTO=y now that there is sufficient space for SPL in SPI flash, and to fix a build issue reported by Peter Robinson. Fixes: 5713135e ("rockchip: rockpro64: Build u-boot-rockchip-spi.bin") Reported-by:
Peter Robinson <pbrobinson@gmail.com> Signed-off-by:
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The Pine64 SOQuartz compute module is mostly pin-compatible with the RPi CM4 form factor. Therefore, it can slot into the official Raspberry Pi CM4 IO carrier board. Add this configuration to U-Boot. Features tested with a SOQuartz 4GB v1.1 2022-07-11: - SD-card boot - eMMC boot - USB host Device tree is imported from linux v6.4. Co-developed-by:
Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Signed-off-by:
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The Pine64 SOQuartz Blade board is a carrier board for the SOQuartz CM4-compatible compute module. It features PoE, an M.2 slot, an SD card slot, HDMI, USB, serial and ethernet. Features tested with a SOQuartz 4GB v1.1 2022-07-11: - SD-card boot - eMMC boot - PCIe/NVMe - USB host Device tree is imported from linux v6.4. Co-developed-by:
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The Pine64 SOQuartz Model A board is a carrier board for the SOQuartz CM4-compatible compute module. It exposes PCIe, ethernet, USB, HDMI, CSI, DSI, eDP and a 40 pin GPIO header, and is powered by 12V DC. Features tested with a SOQuartz 4GB v1.1 2022-07-11: - SD-card boot - eMMC boot - PCIe/NVMe/AHCI - USB host Device tree is imported from linux v6.4. Co-developed-by:
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The Pine64 Quartz64 Model B is a credit-card sized single-board computer based on the Rockchip RK3566 SoC. The board features an M.2 PCIe slot, USB3, USB2, eMMC, SD, ethernet, HDMI, analog audio out, a 40 pin GPIO header and a DSI and CSI port, as well as on-board Wi-Fi. Features tested on a Quartz64-B 4GB v1.4 2022-06-06: - SD-card boot - eMMC boot - SPI Flash boot - PCIe/NVMe - USB host Device tree is imported from linux v6.4. Co-developed-by:
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The Pine64 Quartz64 Model A is a single-board computer based on the Rockchip RK3566 SoC. The board features USB3, SATA, PCIe, HDMI, USB2.0, CSI, DSI, eDP, eMMC, SD, and an e-paper parallel port, as well as a 20 pin GPIO header. Features tested on a Quartz64-A 8GB v2.0 2021-04-27: - SD-card boot - eMMC boot - PCIe/NVMe/AHCI - USB host Device tree is imported from linux v6.4. Co-developed-by:
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Change RK3568 devices to use the newer dwc3-generic driver instead of the old xhci-dwc3 driver for USB 3.0 support. Signed-off-by:
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Commit ec107f04 ("rockchip: chromebook_minnie: Enable sound") and commit 2d0c01b8 ("sound: rockchip: Add sound support for jerry") enable audio support for chromebook_minnie and chromebook_jerry. Enable it for chromebook_speedy as well, but put the non-upstream sound node in the board -u-boot.dtsi instead. Signed-off-by:
Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
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Sound support for chromebook_jerry needs the MAX98090 codec driver. This was enabled in commit 2d0c01b8 ("sound: rockchip: Add sound support for jerry"), but apparently lost in commit 7ae27294 ("configs: Resync with savedefconfig"). Enable it again. Signed-off-by:
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Commit 815ed79d ("video: rockchip: Use TrueType fonts with jerry") enables makes chromebook_jerry use TrueType fonts. Make other veyron boards switch to it as well. Signed-off-by:
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Commit eba768c5 ("rockchip: jerry: Add serial support") enables ROCKCHIP_SERIAL for chromebook_jerry to make the serial console work correctly. Enable it also for other veyron boards. Also enable logging and disable scrolling multiple lines at once as in chromebook_jerry, and enable silent console as chromebook_minnie does. Signed-off-by:
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Commit 70e351bd ("rockchip: jerry: Enable RESET driver") enables DM_RESET for chromebook_jerry to fix its display as required by changes to the Rockchip video drivers. Enable it for other veyron boards as well. Fixes: cd529f7a ("rockchip: video: edp: Add missing reset support") Fixes: 9749d2ea ("rockchip: video: vop: Add reset support") Signed-off-by:
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DEBUG_UART_SKIP_INIT feature is implemented only by s5p (DEBUG_UART_S5P) and pl01x (DEBUG_UART_PL010 or DEBUG_UART_PL011) serial drivers, but all ARCH_ROCKCHIP configs rely on default DEBUG_UART_NS16550. The ns16550 serial driver does not depends on DEBUG_UART_SKIP_INIT, so drop it from rockchip configs. Signed-off-by:
Massimo Pegorer <massimo.pegorer@vimar.com> Reviewed-by:
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Call to board_debug_uart_init() is useless, as mainline U-Boot can not build TPL for rk3308, and proprietary ddr.bin to be used as TPL is responsible to init debug uart. Moreover current implementation of board_debug_uart_init() is not compatible with ROCK Pi S, as it sets pins for UART2 channel 1 breaking access to sdmmc due to pinmux conflict. Debug uart for ROCK Pi S is UART0. Thus, avoid ROCKCHIP_RK3308 to select DEBUG_UART_BOARD_INIT and allow to deselct it in rock-pi-s-rk3308_defconfig. The DEBUG_UART_BOARD_INIT is already implied by ARCH_ROCKCHIP, therefore other boards based on rk3308 chip are not affected by change. Signed-off-by:
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- Jul 28, 2023
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This is more complex than it needs to be and makes converting these boards over to plain text env files more difficult. Remove setting mtdparts as the DTS already contain the partitions. While here also drop the conflicting definitions from the K2 defconfigs. Signed-off-by:
Andrew Davis <afd@ti.com> Reviewed-by:
Tom Rini <trini@konsulko.com>
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This was regressed by the following commit and is required to build with additional configs enabled. Fixes: 14439cd7 ("configs: k3: make consistent bootcmd across all k3 socs") Signed-off-by:
Manorit Chawdhry <m-chawdhry@ti.com> Tested-by:
Nikhil M Jain <n-jain1@ti.com>
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Only accept SPACE to stop autobooting. This is safer to avoid accidental interruptions on unattended devices. Signed-off-by:Jan Kiszka <jan.kiszka@siemens.com>
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This avoids having to maintain to defconfigs that are 99% equivalent. The approach is to use binman to generate two flash images, flash-pg1.bin and flash-pg2.bin. With the help of a template dtsi, we can avoid duplicating the common binman image definitions. Suggested-by:
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The common env bits now come via ti_armv7_common.env, include it. Furthermore restore the board-specific boot targets and their ordering that is now enforced k3-wide differently. Finally, enable CONFIG_LEGACY_IMAGE_FORMAT explicitly which got lost while turning FIT_SIGNATURE on by default for k3 devices. Fixes: 53873974 ("include: armv7: Enable distroboot across all configs") Fixes: 4ae1a247 ("env: Make common bootcmd across all k3 devices") Fixes: 86fab110 ("Kconfig: Enable FIT_SIGNATURE if ARM64") Signed-off-by:
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Hardkernel ODROID-M1 is a single board computer with a RK3568B2 SoC, a slightly modified version of the RK3568 SoC. Features tested on a ODROID-M1 8GB v1.0 2022-06-13: - SD-card boot - eMMC boot - SPI Flash boot - PCIe/NVMe/AHCI - SATA port - USB host Device tree is imported from linux v6.4. Signed-off-by:
Stefan Agner <stefan@agner.ch> Tested-by:
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Add missing pinctrl and defconfig options to enable PCIe and NVMe support on Radxa ROCK 3 Model A. Use of pcie20m1_pins and pcie30x2m1_pins ensure IO mux selection M1. The following pcie_reset_h and pcie3x2_reset_h ensure GPIO func is restored to the perstn pin, a workaround to avoid having to define a new rockchip,pins. Signed-off-by:
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