- Sep 28, 2018
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Add tests for the hex2bin, bin2hex, and hex_to_bin functions, which were recently added to U-Boot. Signed-off-by:
Mario Six <mario.six@gdsys.cc> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Add a unit test assert-method, which compares two given memory areas for byte-wise equality. Signed-off-by:
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Add sandbox driver and tests for the new OSD uclass. Signed-off-by:
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Add a driver for IHS OSDs on IHS FPGAs. Reviewed-by:
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Some devices offer a text-based OSD (on-screen display) that can be programmatically controlled (i.e. text displayed on). Add a uclass to support such devices. Reviewed-by:
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The EFI subsystems needs to know the size of the terminal. If the environment variable stdout = serial,vidconsole this size cannot be read from the video console. So the EFI subsystem sends escape sequences to read the size. With this patch we get support for the following escape sequences: ESC "7" Save cursor position ESC "8" Restore cursor position Signed-off-by:Heinrich Schuchardt <xypron.glpk@gmx.de>
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The third component of struct vidconsole_priv is ycur. Signed-off-by: -
The include/video*.h files are part of the drivers in drivers/video. So it makes sense to assign them to the same maintainer. Signed-off-by:
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- Sep 27, 2018
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git://git.denx.de/u-boot-microblazeTom Rini authored
Xilinx changes for v2018.11 - Handle BOARD_LATE_INIT via Kconfig SPL: - Enable GZIP for all partitions types(not only for kernel) ZynqMP: - Rearrange pmufw version handling - Support newer PMUFW with improved fpga load sequence Zynq: - Cleanup config file - Simplify zybo config by enabling option via Kconfig net: - Fix gems max-speed property reading - Enable support for fixed-link phys
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Michal Simek authored
Based on dt-specs fixed-link doesn't require phy-handle to be used. Fix driver to only read phy related setting when phy-handle is found. Signed-off-by:
Michal Simek <michal.simek@xilinx.com> Acked-by:
Joe Hershberger <joe.hershberger@ni.com>
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- Sep 26, 2018
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git://github.com/agraf/u-bootTom Rini authored
Patch queue for efi - 2018-09-26 A lot of goodness in this release. We're *very* close to running the UEFI Shell and SCT natively. The only missing piece are HII protocols. - FAT write support (needed for SCT) - improved FAT directory support (needed for SCT) - RTC support with QEMU -M virt - Sandbox support (run UEFI binaries in Linux - yay) - Proper UTF-16 support - EFI_UNICODE_COLLATION_PROTOCOL support (for UEFI Shell) - EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL support (for UEFI Shell) - Fix window size determination - Fix Tegra by explicitly unmapping RAM - Clean up handle entanglement - Lots of generic code cleanup [trini: Fixup merge conflict in include/configs/qemu-arm.h] Signed-off-by:Tom Rini <trini@konsulko.com>
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Alexander Graf authored
When running sandbox with the new pointer sanitization we just recently introduced, we're running into a case with FIT images where we end up interpreting pointers as addresses. What happened is that most callers of set_working_fdt_addr() simply convert pointers into addresses without taking into account that they might be 2 separate address spaces. Fix the callers up to map their pointers into addresses. This makes sandbox tests pass for me again. Signed-off-by:Alexander Graf <agraf@suse.de>
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Luis Araneda authored
Only add CONFIG_DISPLAY to defconfig because CONFIG_I2C_EDID is automatically selected by CONFIG_DISPLAY Signed-off-by:
Luis Araneda <luaraneda@gmail.com> Signed-off-by:
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Siva Durga Prasad Paladugu authored
max-speed property is part of phynode and it has to be read using ofnode_read_u32_default(). This fixes the issue of incorrect max-speed read from DT. Signed-off-by:
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Acked-by:
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Michal Simek authored
There is no reason to limit gzip usage only for OS_BOOT and kernel image type. Signed-off-by:
York Sun <york.sun@nxp.com>
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Siva Durga Prasad Paladugu authored
This patch modifies PL bitstream loading sequence as per latest Xilfpga which supports all variants of bitstream images generated from vivado and from bootgen. With this new change in Xilfpga, uboot doesn't need to validate and swap bitstream as it will be taken care inside Xilfpga. ZynqMP PL driver now checks for supporting PMUFW version before skipping the validation and swap sequence as there can be old PMUFW which doesn't supports this feature. In this case, driver uses old way of PL bitstream loading sequence. Signed-off-by:
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Siva Durga Prasad Paladugu authored
Modify the zynqmp_pmufw_version() routine to return PMUFW version so that it can be reused wherever required. Get PMUFW version from PMU only once at bootup and later just return stored value. Signed-off-by:
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Siva Durga Prasad Paladugu authored
This patch moves the PM version related macros to .h file so that they can be reused in other files. Signed-off-by:
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Michal Simek authored
Moving options to Kconfig some comments are useless now. Signed-off-by: -
Michal Simek authored
Disable BOARD_LATE_INIT via Kconfig. Signed-off-by: -
Now that we already disable the "strict-aliasing" globally, remove the duplicates in the nds32/riscv/x86 arch-specific Makefiles. Signed-off-by:
Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by:
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The -fstrict-aliasing option is implicitly enabled at levels -O2, -O3, -Os by GCC. This option allows the compiler to assume the strictest aliasing rules applicable to the language being compiled. For example, the practice of reading from a different union member than the one most recently written to (called "type-punning") is common. In this case, "type-punning" only works if the memory is accessed through the union type, but might not work by taking the address, casting the resulting pointer and dereferencing the result, which is an undefined behavior per the "strict aliasing rules". GCC's -Wstrict-aliasing (included in -Wall) option does not catch all cases, but does attempt to catch the more common pitfalls. So there are cases that GCC does not report but the codes are violating the "strict aliasing rules". Given lots of codes that may be written to rely on "type-punning", and Linux kernel disables it by -fno-strict-aliasing globally, since U-Boot currently does this on nds32/riscv/x86 builds only, extend this for all architecture builds. Signed-off-by:
Bin Meng <bmeng.cn@gmail.com>
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AM654 uses a UART controller that is compatible (partially) with existing OMAP UART, Introduce a compatible for adding support for this controller. Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com> -
This option has never been used for anything. Drop it. Signed-off-by:
Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Reviewed-by:
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These options are not used or necessary when device model is being used for SCSI. Just drop them. Signed-off-by:
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When using device model this sort of hardcoded limits aren't used or necessary. Signed-off-by:
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The loop in ahci_start_ports() is looping over the maximum number of SCSI devices in the system, which can be larger than the amount of ports a particular AHCI controller has. The extra looping isn't directly harmful because the link_port_map bitmap won't have the bit set for a nonexistent port, but it is wasteful. Replace the loop limit with the port count of the AHCI controller instead. Signed-off-by:
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Make use of asm-generic/atomic.h. Signed-off-by:
Chris Packham <judge.packham@gmail.com> Acked-by:
Max Filippov <jcmvbkbc@gmail.com>
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Make use of asm-generic/atomic.h. Signed-off-by: -
Make use of asm-generic/atomic.h retaining the smp_mb_... definitions. Signed-off-by:
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The arm, xtensa and mips version of atomic.h were already very similar (the mips one was a copy of xtensa). Combine these implementations together to produce a generic atomic.h that can be included by these architectures (and any others that need it in future). Signed-off-by:
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The 'conitrace' command prints the codes received from the console input as hexadecimal numbers. This developer utility is useful for testing the handling of special keys by keyboard drivers. Signed-off-by: -
The MMC card detect pin is connected to gpio127 on omap3_logic. When setting up the pbias register for MMC, let's also enable gpio_127 for the card detect. As part of the package deal, gpio_126 and gpio_129 are also enabled. Signed-off-by:Adam Ford <aford173@gmail.com>
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Tom Rini authored
In the section about Device Trees add a paragraph at the end that clarifies how we decide of a tree is valid or not. We say that all bindings must either be in the specification (link provided) or in our device-tree-bindings directory. We say that most of these come from the Linux Kernel and as such some design decisions are made for us already, but that in most cases we wish to retain compatibility. Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Signed-off-by:
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The SSP2 clock is at bit 6 in the register, so the value is 0x40 unlike the current 0x70 which enables the clock of UART2, SSP1 and SSP2. Signed-off-by:
Quentin Schulz <quentin.schulz@bootlin.com> Acked-by:
Stefan Roese <sr@denx.de>
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SPI controllers SSP1, 2 and 3 require to enable their respective clocks. Let's enable them only when the SPI controller driver is built. Signed-off-by: -
This adds support for the ARM PL022 SPI controller for the standard variant (0x00041022) which has a 16bit wide and 8 locations deep TX/RX FIFO. A few parts were borrowed from the Linux kernel driver. Cc: Armando Visconti <armando.visconti@st.com> Cc: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: -
Enable CONFIG_OF_BOARD_SETUP as it is needed for Beaglebone black to overwrite the Ethernet phy address present in DT in case the phy latches on to a different address. Signed-off-by:
Sekhar Nori <nsekhar@ti.com> Reviewed-by:
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On beaglebone black, it can so happen that PHY address is not latched correctly on reset and board boots with PHY responding to a different address than that programmed in device-tree. For example, see this report: https://groups.google.com/d/msg/beagleboard/9mctrG26Mc8/1FuI_i5KW10J Workaround this by fixing up device-tree passed to kernel by using the PHY address detected in hardware. Beaglebone itself uses only one ethernet port and its DT currently uses phy_id (obsoleted). But the function has been written to handle multiple ports and phy_id as well as phy-handle to make the function more generically useful. Signed-off-by:
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On some boards using TI CPSW, it may be possible that PHY address was not latched correctly, and the actual address that the phy responds on is different from that set in device-tree. For example, see this problem report on beaglebone black: https://groups.google.com/d/msg/beagleboard/9mctrG26Mc8/1FuI_i5KW10J Add support to check for this condition and use the detected phy address when its safe to do so. Also, add a public API that exposes the phy address of a given slave. This can be used to update device-tree that is passed to Linux kernel. Signed-off-by:
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