- Feb 05, 2022
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8ULP ROM should read the LPOSC trim BIAS fuse to fill the CGC0 LPOSCCTRL[7:0], but it writes a fixed value on A0.1 revision. A0.2 will fix the issue in ROM. But A0.1 we have to workaround it in SPL by setting LPOSCCTRL BIASCURRENT again. Reviewed-by:
Peng Fan <peng.fan@nxp.com> Signed-off-by:
Ye Li <ye.li@nxp.com> Signed-off-by:
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Remove the freescale vendor name from CPU revision print to align with other i.MX platforms Reviewed-by:
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The setting does not have effect because we should set it after power on the PS16 for NIC AV. So move it after upower_init which has powered on all PS Reviewed-by:
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To avoid DCNANO underrun issue on high loading test, set its read Qos on NIC_LPAV to highest Reviewed-by:
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The board use IO9 of PCA6416 on LPI2C0 and TPM0 for MIPI DSI MUX and backlight. However the LPI2C0 and TPM0 are M33 resources, in this patch we simply access them, but this is a temporary solution. We will modify it when M33 FW changes to set MIPI DSI panel as default path and enable backlight after reset. Signed-off-by:
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For singel boot, set flexspi0 mem to be accessed by A35 Signed-off-by:
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Add the DSI clock enable and disable with PCC reset used. Add the LCD pixel clock calculation and configuration for DCNano Signed-off-by:
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Add the PCC5 clocks support and more LPAV clocks and PLL4 PFD in CGC. Signed-off-by:
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Assign the PXP/HIFI4/EPDC to APD domain, otherwise APD not able to receive interrupts from the modules. Reviewed-by:
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When single boot, assign AP domain as the master domain of the LPAV. Allocates LPAV master and slave resources like GPU, DCNano, MIPI-DSI eDMA channel and eDMA request to APD Signed-off-by:
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S400 enables RDC only when the DBD_EN is fused. Otherwise, the RDC is allowed by all masters. Current S400 has issue if the XRDC has released to A35, then A35 reset will fail in ROM due to S400 fails to get XRDC. So temp work around is checking the DBD_EN, if it is not fused, we don't need to call release XRDC or TRDC. Signed-off-by:
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Change boot device logic to also allow environment stored in fat and in ext4 when booting from SD or from eMMC. As the boot device check for SD and for eMMC was depending on ENV_IS_IN_MMC being defined, change the ifdef blocks at env_get_location to use IS_ENABLED instead for all modes, returning NOWHERE when no valid mode is found. Signed-off-by:
Ricardo Salveti <ricardo@foundries.io> Reviewed-by:
Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Reviewed-by:
Fabio Estevam <festevam@gmail.com>
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Correct printf format for unsigned long long is %llx and not %llxx. Signed-off-by:
Pali Rohár <pali@kernel.org> Reviewed-by:
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The imx28 uses following voltage supplies hierarchy: VDD_5V (VDD_BAT) -> VDDIO -> VDDA -> VDDMEM \-----> VDDD One shall first enable DCDC on the parent source (VDDIO) and then follow with its children. Signed-off-by:
Lukasz Majewski <lukma@denx.de> Reviewed-by:
Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by:
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Fix the invalid gw7902 M2_RST# gpio pinmux. Signed-off-by:
Tim Harvey <tharvey@gateworks.com> Reviewed-by:
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Add EA iMX7ULP COM board support for building SPL. Signed-off-by:
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Force selecting features present in SoC i.MX7ULP. Signed-off-by:
Igor Opaniuk <igor.opaniuk@foundries.io>
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Return the root clock values for MXC_CSPI_CLK, MXC_I2C_CLK, MXC_UART_CLK and MXC_QSPI_CLK. At least for the I2C clock the missing support leads to a wrong configured I2C frequency. The expected value is 100kHz but the resulting value is about 1MHz. Signed-off-by:
Heiko Thiery <heiko.thiery@gmail.com> Reviewed-by:
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Use the complete 512kb (4 blocks) nand partition reserved for u-boot environment instead of just the first block, this allows the module to have a working environment even if 3 blocks are bad. Signed-off-by:Francesco Dolcini <francesco.dolcini@toradex.com>
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- Feb 04, 2022
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https://source.denx.de/u-boot/custodians/u-boot-sunxiTom Rini authored
This is the promised second part of the sunxi PR for 2022.04, albeit technially outside of the merge window. We were working on this full steam since the beginning of the year, and it deserves to be merged, I think. The main attraction is support for the F1C100s SoC, which sports a venerable ARM926 core. Support for this SoC and the LicheePi Nano board has been in Linux for years, and U-Boot patches were posted mid last year already. The new SoC using ARMv5 also means that the bulk of the new code should not touch any existing boards, although we did some refactorings first, of course, which actually cleans up some existing sunxi code. Compile tested for all 160 sunxi boards, and briefly tested on BananaPi M1, OrangePi Zero, Pine64 and Pine-H64. Tested by others on their boards, including F1C100s and F1C200s devices.
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The Lichee Pi Nano is a board based on the F1C100s. Add defconfigs for it. Signed-off-by:
Icenowy Zheng <icenowy@aosc.io> Signed-off-by:
Jesse Taube <Mr.Bossman075@gmail.com> Reviewed-by:
Andre Przywara <andre.przywara@arm.com> Signed-off-by:
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Add device tree files for suniv and Lichee Pi Nano it is a board based on F1C100s. dt-bindings/dts are synced with 5.16.0 Signed-off-by:
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Add support for the suniv architecture, which is newer ARM9 SoCs by Allwinner. The design of it seems to be a mixture of sun3i, sun4i and sun6i. Signed-off-by:
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Adds support for SUNIV and the F1C100s. Signed-off-by:
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Generic Timer Extension is not available on SUNIV. Signed-off-by:
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Add support for F1C100s internal dram controller. Signed-off-by:
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This patch aims to add header files for the suniv. The header files included add support for uart, and clocks. Signed-off-by:
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Some Allwinner SoCs use ARM926EJ-S core. Add Allwinner/sunXi specific code to ARM926EJ-S CPU dircetory. Signed-off-by:
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Both armv7 and arm926ejs use this timer code so move it to mach-sunxi. Signed-off-by:
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The ARMv7 start code has support for saving some boot params at the entry point, which is used by some SoCs to return to BROM. Port this to ARM926EJ-S start code. Signed-off-by:
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André Przywara authored
Remove some pointless #ifdefs from this file, as there are quite too many of them already. Some definitions don't really hurt to have in any case, so remove the pointless CONFIG_MMC guard around CONFIG_MMC_SUNXI_SLOT. The BOARD_SIZE_LIMIT applies regardless of ARM64 or not (now), so remove that guard as well. The maximum number of MMC devices does not depend on CONFIG_ENV_IS_IN_MMC, so move that out to simplify the file. Last but not least CONFIG_SPL_BOARD_LOAD_IMAGE serves no real purpose anymore: it's unconditionally defined for all sunxi boards, and protects nothing applicable outside of sunxi code anymore. Just remove it. Reviewed-by:
Samuel Holland <samuel@sholland.org> Reviewed-by:
Simon Glass <sjg@chromium.org> Tested-by:
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André Przywara authored
When we added Allwinner SoC support to ARMv8, we needed to pull in an implementation of lowlevel_init() calling the C function s_init(), as sunxi required it as this time. The last few patches got rid of this bogus requirement, and as sunxi was still the only user, we can now remove this lowlevel_init.S from ARMv8 altogether. Signed-off-by:
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André Przywara authored
Currently we do some magic "SRAM setup" MMIO writes in s_init(), copied from the original BSP U-Boot. The comment speaks of this being required before DRAM access gets enabled, but there is no indication that this would actually be required that early. Move this out of s_init(), into board_init_f(). Since this actually only affects a very few older SoCs, the actual code goes into the cpu/armv7 directory, to move it out of the way for all other SoCs. This also uses the opportunity to convert some #ifdefs over to the fancy IS_ENABLED() macros used in actual C code. We keep the s_init() stub around for now, since armv8's lowlevel_init still relies on it. Signed-off-by:
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André Przywara authored
According to their TRMs, Cortex ARMv7 CPUs with SMP support require the ACTLR.SMPEN bit to be set as early as possible, before any cache or TLB maintenance operations are done. As we do those things still in start.S, we need to move the SMPEN bit setting there, too. This introduces a new ARMv7 wide symbol and code to set bit 6 in ACTLR very early in start.S, and moves sunxi boards over to use that instead of the custom code we had in our board.c file (where it was called technically too late). In practice we got away with this so far, because at this point all the other cores were still in reset, so any broadcasting would have been ignored anyway. But it is architecturally cleaner to do it early, and we move a core specific piece of code out of board.c. This also gets rid of the ARM_CORTEX_CPU_IS_UP kludge I introduced a few years back, and moves the respective logic into the new Kconfig entry. Signed-off-by: -
André Przywara authored
So far all Allwinner based boards were doing some not-so-lowlevel-setup in lowlevel's s_init() routine. This includes the initial clock, timer and pinmux setup, among other things. This is clearly out of the "absolute bare minimum to get started" scope that lowlevel_init.S suggests for this function. Since we have an SPL, which is called right after s_init(), move those calls to our board_init_f() function. As we overwrite this only for the SPL, this has the added benefit of not doing this setup *again* shortly afterwards, when running U-Boot proper. This makes gpio_init() to be called from the SPL only, so pull this code into a CONFIG_SPL_BUILD protected part to avoid build warnings. Reviewed-by:
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- Feb 03, 2022
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Tom Rini authored
- Update CI image to have libgnutls available. - Assorted ARM and SPL bugfixes
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At present we use wide characters for Unicode but this is not necessary. Change the code to use the 'u' literal instead. This helps to fix build warnings for sandbox on the Raspberry Pi. Signed-off-by:
Heinrich Schuchardt <xypron.glpk@gmx.de>
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At present we use wide characters for unicode but this is not necessary. Change the code to use the 'u' literal instead. This helps to fix build warnings for sandbox on rpi. Signed-off-by:
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This resyncs us with the version found in v5.16 of the Linux kernel with the following exceptions: - Keep our u-boot specific tests / code area. - Change the location of checkpatch.rst - Drop the "use strscpy" test as we don't have that, but do have strlcpy and want that used now. - Keep debug/printf in the list for $logFunctions This also syncs the spdxcheck.py tool and all the associated documentation. S Signed-off-by: -
There is some code that tries to "reset" the SCTLR_ELx register early in the boot process. The idea seems to be to guarantee some sane settings that U-Boot actually relies on, for instance running in little-endian mode, with the MMU off initially. However the current code has multiple problems: - For a start, no platform or config defines the symbol that would enable that code. - The code itself really only works if the bits that it tries to clear are already cleared: - If we run in big-endian mode initially, any previous loads would have been wrong already. That applies to the (optional) relocation code, but more prominently to the mask that it uses to clear those bits: "ldr x1, =0xfdfffffa" looks innocent, but actually involves a memory access to the literal pool, using the current endianness. - If we run with the MMU enabled, we are probably doomed already. We *could* hope that we are running with an identity mapping, but would need to do some cache maintenance to avoid losing dirty cache lines. - The idea of doing a read-modify-write of SCTLR is somewhat questionable to begin with, because as the owner of the current exception level we should initialise all bits of this register with a certain fixed value. - The code is unnecessarily complicated, and the function name is misspelled. While those problems *could* admittedly be fixed, the point that is does not seem to be used at all at the moment tells me we should just remove this code, and be it to not give a bad example. If people care, I could introduce some proper SCTLR initialisation code. We are about to work this out for the boot-wrapper[1] as we speak, but apparently we got away without doing this in U-Boot ever since, so it might not be worth the potential trouble. [1] https://lore.kernel.org/linux-arm-kernel/20220114105653.3003399-7-mark.rutland@arm.com/ Signed-off-by:
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