- Jan 17, 2024
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The first sentence is half-way true; the macro is always defined, but has the value 0 or 1. The second is outright false. A lot of code guarded by MEM_SUPPORT_64BIT_DATA uses a "ulong" to store values, so if sizeof(long) is not 8, that code would probably compile, but not work at all as expected. It would probably be possible to make all such code explicitly use u64 and thus make it work on 32 bit targets, but until that is done, do not pretend that it's ok to override the automatic value of MEM_SUPPORT_64BIT_DATA. Signed-off-by:Rasmus Villemoes <rasmus.villemoes@prevas.dk>
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The macro MEM_SUPPORT_64BIT_DATA is always defined, as either 1 or 0, so using "#ifdef MEM_SUPPORT_64BIT_DATA" doesn't do what one expects. This means that currently all 32 bit targets get compiled with the .q suffix mentioned in the help text, while it doesn't actually work. Use the proper "#if" instead. There's really no point defining another similarly-named macro with exactly the same value, so just use MEM_SUPPORT_64BIT_DATA throughout. Signed-off-by: -
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- Jan 16, 2024
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Just check that the length is at least 2. This allows passing strings like ".b", which can be convenient when constructing tests (i.e. parametrizing the suffix used). Signed-off-by: -
This function obviously does not and must not modify "arg". Change the prototype to allow passing an argument of type "const char*" without requiring a cast. Signed-off-by: -
Now that the cp command is changed to use memmove() internally, update the documentation to explicitly state that overlapping regions are allowed. Signed-off-by: -
There's no 'mv' shell command for handling overlapping src and dst regions, and there's no point introducing one, when we can just make the existing 'cp' command DTRT in all cases. memmove() should at most be a few instructions more then memcpy() (to detect the appropriate direction to do the copy), which is of course completely in the noise with all the string processing that a shell command does. Reviewed-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
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Add the following memory tests: memtest_negative - To test mtest command by providing incorrect inputs memtest_ddr - To test memory write-read-comparision for DDR memory Signed-off-by:Love Kumar <love.kumar@amd.com>
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Add reset controller driver for Nuvoton BMCs. The npcm reset driver not only supports reset each module reset but setting initial value of reset Control Registers. And The driver support each module reset. Signed-off-by:Jim Liu <JJLIU0@nuvoton.com>
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Add below test cases for i2c commands: i2c_bus - To show i2c bus info, i2c_dev - To set or show the current bus, i2c_probe - To probe the i2c device, i2c_eeprom - To test i2c eeprom device, i2c_probe_all_buses - To list down all the buses and probes it Signed-off-by: -
Add below test cases for mii commands: mii_info -To display MII PHY info mii_list - To list MII devices mii_set_device - To set MII device mii_read - To reads register from MII PHY address mii_dump - To display data from MII PHY address Signed-off-by:
Tom Rini <trini@konsulko.com>
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Add pe2201 platform code and the device tree of pe2201 platform board. The initial support comprises the UART and PCIe. Signed-off-by:TracyMg_Li <TracyMg_Li@outlook.com> Changes since v1: fix space corrupt. Changes since v2: switch to bootstd and text environment. Changes since v3: add environment variables.
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next_header() and get_next_header() only differ in how the const attribute is used. One function taking a const parameter and returning a non-const is good enough. Signed-off-by:
Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by:
Ilias Apalodimas <ilias.apalodimas@linaro.org>
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QEMU provides SMBIOS tables with detailed information. We should not try to replicate them in U-Boot. If we want to inform about U-Boot, we can add a Firmware Inventory Information (type 45) table in future. Signed-off-by:
Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by:
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Add support for J721E HS-SE 2.0 device. Make use of the existing templates and override the phandles for sysfw.itb so that builds do not fail. Signed-off-by:Neha Malcom Francis <n-francis@ti.com>
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Add documentation for PHYTEC phyCORE-AM62x SoM. Signed-off-by:
Wadim Egorov <w.egorov@phytec.de> Reviewed-by:
Dhruva Gole <d-gole@ti.com>
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Add basic support for PHYTEC phyCORE-AM62x SoM. Supported features: - 2GB DDR4 RAM - eMMC Flash - OSPI NOR Flash - external uSD - Ethernet - debug UART Product page SoM: https://www.phytec.com/product/phycore-am62x Device trees were taken from Linux v6.7-rc3. Signed-off-by:
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Add below test cases for mdio commands: mdio_list - To list MDIO buses mdio_read - To read PHY's register at <devad>.<reg> mdio_write - To write PHY's register at <devad>.<reg> Signed-off-by:
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Abort the dhcp request in the middle by pressing ctrl + c on u-boot prompt and validate the abort status. Signed-off-by:
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https://gitlab.denx.de/u-boot/custodians/u-boot-snapdragonTom Rini authored
Qualcomm architecture changes: * Move clock and pinctrl drivers out of mach-snapdragon * Various clock driver improvements * Convert PMIC power/reset key driver to use the button API * Preparetory work for migrating to upstream DT
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Caleb Connolly authored
sandbox_flattree enables QCOM_PMIC_GPIO which now depends on BUTTON. As a result the button tests now get run, but fail because the ADC and GPIO button drivers aren't enabled. Enable them to run the tests for sandbox_flattree. Reported-by:
Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by:
Caleb Connolly <caleb.connolly@linaro.org>
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Caleb Connolly authored
With the recent changes to the Qualcomm PMIC GPIO driver the sandbox tests for it no longer pass, update the DTS and tests to work with the changes. Signed-off-by: -
Caleb Connolly authored
Linux DTs stuff a value indicating if the USID is a USID or a GSID in the reg property, the Linux SPMI driver then reads the two address cells separately. U-boot's dev_read_addr() doesn't know how to handle this, so use ofnode_read_u32_index() to get just the USID. The Qcom pmic driver doesn't have support for GSID handling, so just ignore the second value for now. Reviewed-by:
Sumit Garg <sumit.garg@linaro.org> Tested-by:
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Caleb Connolly authored
The core and chnl register ranges were swapped on SDM845. Fix it, and fetch the register ranges by name instead of by index. Drop the cosmetic "version" variable and clean up the debug logging. Reviewed-by:
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Caleb Connolly authored
This property is not part of the dt bindings and all boards use the new gpio-ranges property instead. Drop support for this. Reviewed-by:
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Caleb Connolly authored
Use the upstream gpio-ranges property instead of gpio-count, and drop the bank-name property for Qualcomm boards. Reviewed-by:
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Caleb Connolly authored
Upstream uses the gpio-ranges property to define the number of GPIOs, support for parsing this when gpio-count is unspecified Additionally, drop the bank-name property as it isn't used in upstream, and we can just hardcode the bank name instead. Reviewed-by:
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Caleb Connolly authored
Remove the (now unused) GPIO driver for the power and resin buttons on the PMIC. Reviewed-by:
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Caleb Connolly authored
The PMIC button driver is a much better representation of the hardware here, adjust the boards to use upstream DT and the PMIC button driver instead of exposing the buttons as GPIOs and relying on the GPIO-button driver. Reviewed-by:
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Caleb Connolly authored
Qualcomm PMICs include a "pon" function which handles two buttons, the power button and "resin" button (usually volume down). Introduce a new driver following upstream Linux DT to enable these and map them to Enter and Down respectively to enable use in boot menus. Reviewed-by:
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Caleb Connolly authored
priv->pid is uint32_t, but dev_read_addr() returns a uint64_t on arm64, with the upper bits being used for error codes. Do error checking before downcasting to u32 to prevent errors being silently ignored. Reviewed-by:
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Caleb Connolly authored
devm_clk_get() returns an ERR_PTR on failure, not null. Fix the check to avoid the board crashing when the clock isn't available. Additionally, add the missing error handling for this function. Fixes: 324df15a ("serial: qcom: add support for GENI serial driver") Signed-off-by:
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Caleb Connolly authored
commit 1b15483d ("misc: add Qualcomm GENI SE QUP device driver") introduced support for platform-specific oversampling values, necessary to configure the UART clocks on all platforms at runtime. However it relies in probing a parent device. Despite the DM_FLAG_PRE_RELOC flag, this is not done consistently during boot. Instead, take another approach by relying on ofnode_ helpers to read the serial engine base address and do the read directly. This fixes early UART on boards with a non-default oversampling rate. Signed-off-by:
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Caleb Connolly authored
Replaces the uses of "unsigned" with "unsigned int". Reviewed-by:
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Caleb Connolly authored
The pinctrl and GPIO drivers are currently heavily incompatible with upstream. Most Qualcomm pinctrl blocks feature "tiles" of pins, each at it's own address. Introduce support for these by allowing the soc driver to specify per-pin register offsets similarly to the Linux driver. Adjust the GPIO driver to handle these too, and finally enable support for all pins with the same numbering as used in Linux. Reviewed-by:
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Caleb Connolly authored
Drop the duplicated pinctrl-snapdragon driver from mach-ipq40xx and add it to drivers/pinctrl/qcom. Acked-by:
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Caleb Connolly authored
Move the Qualcomm pinctrl drivers out of mach-snapdragon and over to the rest of the pinctrl drivers, adjust the drivers so that support for each platform can be enabled/disabled individually and introduce platform specific configuration options. Reviewed-by:
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Caleb Connolly authored
The RCG divider field takes a value of (2*h - 1) where h is the divisor. This allows fractional dividers to be supported by calculating them at compile time using a macro. However, the clk_rcg_set_rate_mnd() function was also performing the calculation. Clean this all up and consistently use the F() macro to calculate these at compile time and properly support fractional divisors. Additionally, improve clk_bcr_update() to timeout with a warning rather than hanging the board, and make the freq_tbl struct and helpers common so that they can be reused by future platforms. Reviewed-by:
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Caleb Connolly authored
This property is needed on some platforms to ensure that only the relevant bits are set in the M/N/D registers. Reviewed-by:
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