- Apr 10, 2021
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The PWM device provided by Chrome OS EC doesn't really support anything other than setting a relative duty cycle. To support it as a backlight, this patch makes the PWM period optional in the device tree and pretends the valid brightness range is its period_ns. Also adds a sandbox test for a PWM channel that has a fixed period, checking that the resulting duty_cycle matches on a set_config() even if the requested period_ns can't be set. Signed-off-by:
Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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In order to ensure that the VOP registers are in correct state, add missing support for the VOP reset lines found in the device-tree Signed-off-by:
Arnaud Patard <arnaud.patard@rtp-net.org> Tested-by:
Peter Robinson <pbrobinson@gmail.com>
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In order to ensure that the eDP registers are in correct state, add missing support for the eDP reset lines found in the device-tree. Signed-off-by:
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The debug string printing the device name, framebuffer address and of node is using %lu as format for the framebuffer address, which is not so nice. Change it to %lx. Signed-off-by:
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In the code, the default polarity is set to positive/positive, which is neither normal polarity or inverted polarity. It's only the hardware default. This leads to booting linux with wrong polarity setting. Update the code to use PWM_DUTY_POSTIVE | PWM_INACTIVE_NEGATIVE by default instead. Signed-off-by:
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- uboot rockchip edp code is looking for a rockchip,panel property for the edp dts node, so add it. Signed-off-by:
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When booting with EFI and graphics, the memory used for framebuffer has to be reserved, otherwise it may leads to kernel memory overwrite. Signed-off-by:
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The linux code is setting polarity configuration to 3 but uboot code is setting it to 1. Change the configuration to match the linux configuration Signed-off-by:
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According to linux commit "drm/rockchip: analogix_dp: add rk3399 eDP support" (82872e42bb1501dd9e60ca430f4bae45a469aa64), rk3288 and rk3399 eDP IPs are nearly the same, the difference is in the grf register (SOC_CON6 versus SOC_CON20). So, change the code to use the right register on each IP. The clocks don't seem to be the same, the eDP clock is not at index 1 on rk3399, so don't try changing the clock at index 1 to rate 0 on rk3399. Signed-off-by:
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The current code is using an hard coded enum and the of node reg value of endpoint to find out if the endpoint is mipi/hdmi/lvds/edp/dp. The order is different between rk3288, rk3399 vop little, rk3399 vop big. A possible solution would be to make sure that the rk3288.dtsi and rk3399.dtsi files have "expected" reg value or an other solution is to find the kind of endpoint by comparing the endpoint compatible value. This patch is implementing the more flexible second solution. Signed-off-by:
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- Apr 09, 2021
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https://gitlab.denx.de/u-boot/custodians/u-boot-imxTom Rini authored
u-boot-imx-20210409 ------------------- - Secure Boot : - HAB for MX8M / MX7ULP - CAAM fixes - Fixes for imxrt1020 - Fixes for USDHC driver - Fixes for Toradex (Colibri / Apalis) - Switch to DM for several boards - mx23 olinuxo - usbarmory - marsboard / riotboard - Gateworks GW Ventana - NXP upstream patches (LPDDR / CAAM / HAB) CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/7089
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- Apr 08, 2021
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This reverts the arch/arm/mach-imx/imx_bootaux.c changes of commit 805b3cac. The loader function name was changed so that it does not clash with the generically available function in lib/elf.c. imx-bootaux loads an elf file linked for an auxilary core. Thus the loader function requires address translation from the auxilary core's address space to where those are mapped into U-Boot's address space. So the elf loader is specific and must not be replaced with a generic loader which doesn't provide the address translation functionality. Fixes commit 805b3cac ("lib: elf: Move the generic elf loading/validating functions to lib") Signed-off-by:
Max Krummenacher <max.krummenacher@toradex.com> Acked-by:
Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
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Pass "pfuze3000@8" in pmic_get() so that the PMIC node can be found in the devicetree. Signed-off-by:
Fabio Estevam <festevam@gmail.com> Reviewed-by:
Jaehoon Chung <jh80.chung@samsung.com>
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Some board like imx8mm-evkb, IO voltage switch from 3.3v to 1.8v need around 18ms, common code only delay 10ms, so need to delay extra 8ms. Otherwise voltage switch will timeout when wait for data0 line. This IO voltage switch time depends on board design, depend on the PMIC and capacitance. imx8mm-evkb board use PCA9450(PMIC) and 10uF capacitance. Signed-off-by:Haibo Chen <haibo.chen@nxp.com>
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Common code already handle the voltage switch sequence based on spec, so remove the redundant voltage switch code. Signed-off-by: -
Bitmap files should not be executable. Signed-off-by:
Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by:
Michael Trimarchi <michael@amarulasolutions.com>
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sel_input value for the following uart5 pins is different between i.MX6UL and i.MX6ULL: MX6_PAD_UART5_TX_DATA__UART5_DTE_RX MX6_PAD_UART5_RX_DATA__UART5_DCE_RX MX6_PAD_ENET1_RX_EN__UART5_DCE_RTS MX6_PAD_ENET1_TX_DATA0__UART5_DTE_RTS MX6_PAD_CSI_DATA02__UART5_DCE_RTS As sel_input value for the second one is fixed by the previous commit, fix the rest. Signed-off-by:Yuichiro Goto <goto@k-tech.co.jp>
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Document SRC_GPR10 PERSIST_SECONDARY_BOOT functionality. This is useful for reliable bootloader A/B updates, as it permits switching between two copies of bootloader at different offsets of the same storage. The switch happens in case one copy is corrupted OR can be enforced by user. This functionality is present at least since i.MX53, however is poorly documented in all known SoC datasheets, hence this document aims to clarify the usage, currently on i.MX7D and i.MX8MM. Signed-off-by: Marek Vasut <marex@denx.de> # Original MX7D work, this document Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> # All the MX8M work Cc: Christoph Niedermaier <cniedermaier@dh-electronics.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Harald Seiler <hws@denx.de> Cc: Igor Opaniuk <igor.opaniuk@foundries.io> Cc: Jan Kiszka <jan.kiszka@siemens.com> Cc: Ludwig Zenz <lzenz@dh-electronics.com> Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Ye Li <ye.li@nxp.com> Cc: uboot-imx <uboot-imx@nxp.com> Reviewed-by:Peng Fan <peng.fan@nxp.com>
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Enabled "fsl,legacy-bch-geometry" in U-Boot device tree overlay to match the legacy BCH geometry layout, which mainline Linux applies when "fsl,use-minimum-ecc" is not specified in the device tree. Reinstated SYS_NAND_ONFI_DETECTION, which when disabled, masked the mismatch on SOMs with Winbond NAND flash chips. Signed-off-by:Niel Fourie <lusus@denx.de>
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Convert the Olimex Olinuxino board's support for MMC to driver model following Fabio Estevam's excellent example from: commit: 23013aa9: mx23evk: Convert to driver model Signed-off-by:
Trevor Woerner <twoerner@gmail.com>
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Add the dts file for the Olimex Olinuxino from the linux kernel, and enable its use in this machine's defconfig. Signed-off-by: -
For FSL_USDHC, it do not implement VENDORSPEC_CKEN/PEREN/HCKEN/IPGEN, these are reserved bits. Instead, use VENDORSPEC_FRC_SDCLK_ON to gate on/off the card clock output. After commit b5874b55 ("mmc: fsl_esdhc_imx: add wait_dat0() support"), we meet SD3.0 card can't work at UHS mode, mmc_switch_voltage() fail because the second mmc_wait_dat0 return -ETIMEDOUT. According to SD spec, during voltage switch, need to gate off/on the card clock. If not set the FRC_SDCLK_ON, after CMD11, hardware will gate off the card clock automatically, so card do not detect the clock off/on behavior, so will draw the data0 line low until next command. Fixes: b5874b55 ("mmc: fsl_esdhc_imx: add wait_dat0() support") Tested-by:
Tim Harvey <tharvey@gateworks.com> Signed-off-by:
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Convert the UDOO board to use DM_ETH. Signed-off-by: -
Enable DM block, DM MMC and DM SATA support on iMX6 Udoo convert board code to match the DM support. Signed-off-by: -
The UDOO doesn't have any MTD storage so drop the config. Signed-off-by: -
Enable OF_CONTROL and DM for gpio and pin control support on the i.MX6 based Udoo boards. Signed-off-by: -
Import the i.MX6 based UDOO dts files from Linux 5.12-rc1. Signed-off-by:
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Enable DM_SPI and DM_SPI_FLASH on the mars/riot boards. Signed-off-by: -
Convert the boards to use DM_ETH. Signed-off-by: -
Convert the marsboard/riotboard to use DM_USB. Signed-off-by: -
Convert the two Embest boards to use DM MMC. Signed-off-by: -
Enable OF_CONTROL and DM for gpio and pin control support on the i.MX6D based riotboard. Signed-off-by: -
It doesn't make much sense to have two separate configs for the riotboard so let's merge the SPL config into the main one for less duplication. Signed-off-by: -
Enable OF_CONTROL and DM for gpio and pin control support on the i.MX6Q based embestmx6boards marsboard. Signed-off-by: -
Import the iMX6 based marsboard and riotboard. dts files from Linux 5.12-rc1 Signed-off-by:
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While initializing dram in spl_dram_init(), mdelay() is called that in order calls get_ticks() that verifies if timer exists, if doesn't, it throws a panic(), but since preloader_console_init() has still not been called those panic()s will fail. This doesn't help debugging, so let's setup console before calling spl_dram_init() by moving it after spl_dram_init(). Signed-off-by:Giulio Benetti <giulio.benetti@benettiengineering.com>
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While initializing dram in spl_dram_init(), mdelay() is called that in order calls get_ticks() that verifies if timer exists, if doesn't, it throws a panic(), but since preloader_console_init() has still not been called those panic()s will fail. This doesn't help debugging, so let's setup console before calling spl_dram_init() by moving it after spl_dram_init(). Signed-off-by: -
While initializing dram in spl_dram_init(), mdelay() is called that in order calls get_ticks() that verifies if timer exists, if doesn't, it throws a panic(), but since preloader_console_init() has still not been called those panic()s will fail. This doesn't help debugging, so let's setup console before calling spl_dram_init() by moving it after spl_dram_init(). Signed-off-by: -
There is a QSPI chip connected to the FSPI. Enable the defconfig to support it. Signed-off-by:Adam Ford <aford173@gmail.com>
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There have been a few updates including flexspi, so it's necessary to re-sync. Signed-off-by:
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