- Feb 27, 2023
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Tom Rini authored
Prepare v2023.04-rc3
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Tom Rini authored
I had added this line locally, rebuild the image, but didn't ensure that I had committed the correct version of the patch as well. Fixes: 75b031ee ("Dockerfile: download binaries for Nokia RX-51") Signed-off-by:
Tom Rini <trini@konsulko.com>
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Tom Rini authored
Signed-off-by: -
Tom Rini authored
Rsync all defconfig files using moveconfig.py Signed-off-by:
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- Feb 25, 2023
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Tom Rini authored
- Merge in changes to our Dockerfile so that we build and download ahead of time all of the components required to run the nx51 test scripts. This will both speed up the specific job and address failures in Azure where the ipk files fail to download.
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- Feb 24, 2023
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Now that the Dockerfile creates images which have the binaries we require included, have CI make symlinks for them and update the existing script to support this. Signed-off-by:
Pali Rohár <pali@kernel.org> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Using a pre-built QEMU saves a lot of time when testing. Signed-off-by:Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
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Downloading files for a test may fail if the server is offline. It is preferable to provide the files in our Docker image. Signed-off-by:
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- Feb 23, 2023
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Tom Rini authored
- btrfs bugfix, silence a bunch of gcc-12.2 linker warnings finally, relax one of the trace test time requirements (so CI doesn't fail due to test being slightly slow, but still correct), and correct env on MMC and checking for where GPT can be
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This function allows updating bootloader from u-boot on production devices without need in host PC. Be aware! It works only with re-crypt BCT. Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20 Signed-off-by:
Ramin Khonsari <raminterex@yahoo.com> Signed-off-by:
Svyatoslav Ryhel <clamor95@gmail.com> Signed-off-by:
Tom <twarren@nvidia.com>
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This function allows updating bootloader from u-boot on production devices without need in host PC. Be aware! It works only with re-crypted BCT. Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30 Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30 Signed-off-by:
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Add support for encryption, decryption and signinig with non-zero key saving backward compatibility. Signed-off-by:
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Move crypto module from T20 only into common Tegra dir. Signed-off-by:
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Configure PMIC voltages for early stages using updated early i2c write. Tested-by: Thierry Reding <treding@nvidia.com> # Beaver T30 Signed-off-by:
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Configure PMIC for early stages using updated i2c write. Tested-by: Thierry Reding <treding@nvidia.com> # Jetson TK1 T124 Signed-off-by:
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This implementation allows pwr i2c writing on early SPL stages when DM is not yet setup. Such writing is needed to configure main voltages of PMIC on early SPL for bootloader to boot properly. Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30 Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20 Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30 Tested-by: Thierry Reding <treding@nvidia.com> # T30 and T124 Signed-off-by:
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Late init function allows passing values like identifiers and perform device specific configurations of pre-boot stage. Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30 Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30 Signed-off-by:
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All Nvidia boards use the same manufacturer, vendor ID and product ID for the gadgets. Make them the defaults to remove some boilerplate from the defconfigs. Inspired by commit e02687bd ("sunxi: provide default USB gadget setup") which did the same for Allwinner boards. Tested-by: Thierry Reding <treding@nvidia.com> # T30 and T124 Signed-off-by:
Maxim Schwalm <maxim.schwalm@gmail.com> Signed-off-by:
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Original t20 slink could work with commands only fully divisible by 8. This patch removes such restriction, so commands of any bitlength now can be passed and processed. Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF600T T30 Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30 Tested-by: Thierry Reding <treding@nvidia.com> # T30 and T124 Signed-off-by:
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Default parent clock for the PWM on Tegra is a 32kHz clock and is unable to support the requested PWM period. Fix PWM support on Tegra20, Tegra30, Tegra114, Tegra124 and Tegra210 by updating the parent clock for the PWM to be the PLL_P. This commit is equivalent to Linux kernel commit: https://lore.kernel.org/all/20221010100046.6477-1-jonathanh@nvidia.com/ Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30 Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20 Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # ASUS TF201 T30 Tested-by: Thierry Reding <treding@nvidia.com> # T30 and T124 Signed-off-by:
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On T30 unlike T20 dsi panels are wider used on devices and PLLD is used as DISP1 parent more often, so lets enable it as well for this cases. Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF700T T30 Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # HTC One X T30 Tested-by: Thierry Reding <treding@nvidia.com> # Beaver T30 Signed-off-by:
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Get periph clock id and its parent from device tree. This works by looking up the peripheral's 'clocks' node and reading out the second and fourth cells, which are the peripheral and PLL clock numbers. Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30 Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20 Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # HTC One X Signed-off-by:
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This function allows to convert a device tree clock ID to PLL ID. Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30 Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20 Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # HTC One X Signed-off-by:
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According to mainline clock tables and TRM HOST1X parent is PLLC, while DISP1 usually uses PLLP as parent clock. Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30 Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20 Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30 Tested-by: Thierry Reding <treding@nvidia.com> # Beaver T30 Signed-off-by:
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This mappings were missing for some reason. Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30 Signed-off-by:
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Apply the GPT U-Boot environment GUID type look up only on eMMC user HW partition, do not apply the look up on eMMC boot HW partitions as mmc_offset_try_partition() assumes either SD partitions or eMMC user HW partition. This fixes environment operation on systems where CONFIG_SYS_MMC_ENV_PART is non-zero and CONFIG_SYS_REDUNDAND_ENVIRONMENT is set. Fixes: 80105d8f ("env: mmc: select GPT env partition by type guid") Signed-off-by:
Marek Vasut <marex@denx.de> Reviewed-by:
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We expect the profile and bootstage to agree on timing, but when running on slow machines there can be a larger descrepency. Increase the tolerance to fix this. Fixes: 9cea4797 ("trace: Add a test") Signed-off-by:
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Tom Rini authored
To match how we link EFI executables elsewhere, and to silence a linker warning, pass -z execstack here as well. Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: -
Tom Rini authored
When moving to gcc-12.2 we started trying to quiet some of the new linker warnings, that are not relevant to us. However, a misunderstanding of the mechanics at play meant that I intentionally omitted passing -z noexecstack to the linker, when we do need to. Add this flag and in turn remove warnings from the linker. Fixes: 1e1c51f8 ("Makefile: link with --no-warn-rwx-segments") Signed-off-by:
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[BUG] There is a bug report that btrfs driver caused hang during file read: This breaks btrfs on the HiFive Unmatched. => pci enum PCIE-0: Link up (Gen1-x8, Bus0) => nvme scan => load nvme 0:2 0x8c000000 /boot/dtb/sifive/hifive-unmatched-a00.dtb [hangs] [CAUSE] The reporter provided some debug output: read_extent_data: cur=615817216, orig_len=16384, cur_len=16384 read_extent_data: btrfs_map_block: cur_len=479944704; ret=0 read_extent_data: ret=0 read_extent_data: cur=615833600, orig_len=4096, cur_len=4096 read_extent_data: btrfs_map_block: cur_len=479928320; ret=0 Note the second and the last line, the @cur_len is 450+MiB, which is almost a chunk size. And inside __btrfs_map_block(), we limits the returned value to stripe length, but that's depending on the chunk type: if (map->type & (BTRFS_BLOCK_GROUP_RAID0 | BTRFS_BLOCK_GROUP_RAID1 | BTRFS_BLOCK_GROUP_RAID1C3 | BTRFS_BLOCK_GROUP_RAID1C4 | BTRFS_BLOCK_GROUP_RAID5 | BTRFS_BLOCK_GROUP_RAID6 | BTRFS_BLOCK_GROUP_RAID10 | BTRFS_BLOCK_GROUP_DUP)) { /* we limit the length of each bio to what fits in a stripe */ *length = min_t(u64, ce->size - offset, map->stripe_len - stripe_offset); } else { *length = ce->size - offset; } This means, if the chunk is SINGLE profile, then we don't limit the returned length at all, and even for other profiles, we can still return a length much larger than the requested one. [FIX] Properly clamp the returned length, preventing it from returning a much larger range than expected. Reported-by:Andreas Schwab <schwab@linux-m68k.org> Signed-off-by:
Qu Wenruo <wqu@suse.com>
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Make sure the PHY subsystem is activated for the uniphier DWC3 glue logic, as it depends on PHY implementation there. Signed-off-by:
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- Feb 22, 2023
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git://source.denx.de/u-boot-usbTom Rini authored
- dwc3-generic rework and then switch uniphier to it
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Replacing with dwc3-generic, no need USB_XHCI_DWC3 anymore. Signed-off-by:
Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Reviewed-by:
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dwc3-uniphier depends on xhci-dwc3 framework, however, it is preferable to use dwc3-generic. This driver calls the exported dwc3-generic functions and redefine the SoC-dependent operations to fit dwc3-generic. Signed-off-by:
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Add USB3 PHY driver support to control clocks and resets needed to enable PHY. The phy_ops->init() and exit() control PHY clocks and resets only, and clocks and resets for the controller and the parent logic are enabled in advance. Signed-off-by:
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The USB SS-PHY needs its own clock, however, some clocks don't have clock gates. Define missing clock entries for the PHY as reference clock. Signed-off-by:
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Add reset control support in USB glue logic. This needs to control the external clocks and resets for the logic before accessing the glue logic. The USB dm tree when using dwc3-generic is the following: USB glue +-- controller (need controller-reset) +-- controller-reset (need syscon-reset) +-- phy The controller needs to deassert "controller-reset" in USB glue before the controller registers are accessed. The glue needs to deassert "syscon-reset" before the glue registers are accessed. The glue itself doesn't have "syscon-reset", so the controller-reset controls "syscon-reset" instead. Signed-off-by: -
Add the size of regs property to the glue structure to correctly specify the register region to map. Signed-off-by:
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In order to allow external SoC-dependent glue drivers to use dwc3-generic functions, push the glue structures and export the functions to a header file. The exported structures and functions are: - struct dwc3_glue_data - struct dwc3_glue_ops - dwc3_glue_bind() - dwc3_glue_probe() - dwc3_glue_remove() The SoC-dependent glue drivers can only define their own wrapper driver and specify these functions. The drivers can also add their own compatible strings and configure functions. Signed-off-by:
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