- Jul 15, 2021
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Lokesh Vutla authored
So far all the u-boot specific properties for both r5 and a53 are placed in k3-am654-base-board-u-boot.dtsi. But there are few a53 nodes that should be updated but doesn't belong to r5. So create a separate r5 specific u-boot dtsi. Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210622063431.3151-4-lokeshvutla@ti.com
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The final 128KB in SRAM is reserved by default for DMSC-lite code and secure proxy communication buffer. The memory region used for DMSC-lite code can be optionally freed up by secure firmware API[1]. However, the buffer for secure proxy communication is not configurable. This default hardware configuration is unique for AM64. Therefore, indicate the area reserved for DMSC-lite code and secure proxy communication buffer in the oc_sram device tree node. [1] - http://downloads.ti.com/tisci/esd/latest/6_topic_user_guides/security_handover.html#triggering-security-handover Signed-off-by:
Aswath Govindraju <a-govindraju@ti.com> Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com> Acked-by:
Suman Anna <s-anna@ti.com> Link: https://lore.kernel.org/r/20210616163821.20457-3-a-govindraju@ti.com
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Earlier, the region 0x701c0000 to 0x701dffff was firewalled off because of a bug in SYSFW. In the v2021.05 release of SYSFW this bug has been fixed and this region can now be used for other allocations. Therefore, move TF-A's load address to 0x701c0000 and update its location in the device tree node. Also, increase the size allocated for TF-A to account for future expansions. Fixes: defd62ca ("arm: dts: k3-am64-main: Update the location of ATF in SRAM and increase its max size") Signed-off-by:
Aswath Govindraju <a-govindraju@ti.com> Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by:
Suman Anna <s-anna@ti.com> Link: https://lore.kernel.org/r/20210616163821.20457-2-a-govindraju@ti.com
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- Enable lcd controller - Display splash screen Signed-off-by:
Gireesh Hiremath <Gireesh.Hiremath@in.bosch.com> Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210611161350.2141-16-Gireesh.Hiremath@in.bosch.com
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pinmux update for guardian board - control ASP Board Power: GPIO, on/off ASP Board Power - control Coincell Voltage Measurement: GPIO, enable/disable ADC measurements - powerOff Device GPIO-PowerOff, cut the PMIC supply Signed-off-by:
Moses Christopher <BollavarapuMoses.Christopher@in.bosch.com> Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210611161350.2141-7-Gireesh.Hiremath@in.bosch.com
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- Jul 14, 2021
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Add the device tree for Akebi96. Akebi96 is a 96boards certified development board based on UniPhier LD20. ( https://www.96boards.org/product/akebi96/ ) Signed-off-by:
Masami Hiramatsu <masami.hiramatsu@linaro.org> Signed-off-by:
Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
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- Jul 10, 2021
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ZeroPi is a new board of high performance with low cost designed by FriendlyElec., using the Allwinner H3 SOC. ZeroPi features - Allwinner H3, Quad-core Cortex-A7@1.2GHz - 256MB/512MB DDR3 RAM - microsd slot - 10/100/1000Mbps Ethernet - Debug Serial Port - DC 5V/2A power-supply Signed-off-by:
Yu-Tung Chang <mtwget@gmail.com> Reviewed-by:
Andre Przywara <andre.przywara@arm.com> Signed-off-by:
Andre Przywara <andre.przywara@arm.com>
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André Przywara authored
Update the H3 DT files from the Linux 5.12 release. The changes update some boards, and don't affect U-Boot, but fix Gigabit Ethernet when this DT is passed on to the Linux kernel. Signed-off-by:
Andre Przywara <andre.przywara@arm.com>
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André Przywara authored
Update the H5 DT files from the Linux 5.12 release. The changes don't affect U-Boot at all, but fix Gigabit Ethernet when this DT is passed on to the Linux kernel. It also introduces DVFS. This also updates the shared sunxi-h3-h5.dtsi, but that only adds nodes that are of no concern to U-Boot. Signed-off-by:
Andre Przywara <andre.przywara@arm.com>
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André Przywara authored
Update the H6 DT files from the Linux 5.12 release. The changes are minimal (many LED node renames), but also help to enable USB port 0 in U-Boot (later), enable the RSB device (not yet used in U-Boot), and also introduce an MMC frequency limit. Signed-off-by:
Andre Przywara <andre.przywara@arm.com>
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- Jul 06, 2021
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It looks like SD card detection is broken at the moment for DB410c. The eMMC is detected correctly, but the SD card is not. This is probably similar to the issue fixed in commit 85051474 ("mmc: msm_sdhci: Use mmc_of_parse for setting host_caps") for eMMC, except that the SD card does not have a property like "non-removable" that skips the card detection. The SDHCI on DB410c cannot detect itself if a SD card is inserted, so add the necessary cd-gpios to make SD card detection work again. While at it, fix the #gpio-cells for the soc_gpios to avoid DTC warnings - the soc_gpios are actually already used with two cells for the gpio-leds so this was just wrong all the time. Cc: Ramon Fried <rfried.dev@gmail.com> Signed-off-by:
Stephan Gerhold <stephan@gerhold.net> Reviewed-by:
Ramon Fried <rfried.dev@gmail.com>
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Add basic support for running U-Boot on the Embedded Artists LPC3250 Developer's Kit v2 board by launching U-Boot from the board's s1l loader (which comes pre-installed on the board). Signed-off-by:
Trevor Woerner <twoerner@gmail.com>
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Import the dtsi, dts, and clock binding files for the lpc32xx ea3250 board directly and unmodified from the latest Linux kernel. Signed-off-by:
Trevor Woerner <twoerner@gmail.com>
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Add device trees for 96boards EE DeveloperBox and basement SynQuacer SoC dtsi. These files are imported from EDK2 commit 83d38b0b4c0f240d4488c600bbe87cea391f3922 as-is (except for the changes #include path and some macros). And add U-Boot specific changes in synquacer-sc2a11-developerbox-u-boot.dtsi Signed-off-by:
Masami Hiramatsu <masami.hiramatsu@linaro.org>
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Eugen Hristev authored
The GPIO polarity for onewire must be GPIO_ACTIVE_HIGH. On previous versions this used to work as it looks like the right flag values are being passed since : https://lists.denx.de/pipermail/u-boot/2020-April/407195.html And that series broke the old functionality for onewire nodes. Some boards had the correct value for the polarity, but it wasn't clear so I replaced it with the right macro for the flag, instead of an empty value. Signed-off-by:
Eugen Hristev <eugen.hristev@microchip.com>
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Now that u-boot gained DSA support, and it is already enabled for the kontron_sl28 board, add the last missing piece and enable the corresponding devices it in the device tree. Signed-off-by:
Michael Walle <michael@walle.cc>
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The enetc-2 port is used as DSA master (connected back-to-back to mscc_felix_port4). Since the convention is to not enable ports in the common SoC dtsi unless they are used on the board, then enable enetc-2 only when mscc_felix_port4 itself is enabled. All existing device trees appear to adhere to this rule, so disable enetc-2 in the SoC dtsi. Signed-off-by:
Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by:
Ramon Fried <rfried.dev@gmail.com>
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To comply with the device tree bindings expectations for an Ethernet controller, as well as to simplify the driver code, declare fixed-link nodes for the internal ENETC ports (attached to the mscc_felix switch). Signed-off-by:
Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by:
Ramon Fried <rfried.dev@gmail.com>
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There are no PCB trace delays on this board, so the PHY needs to enable its internal ones in order to have a proper electrical connection to the enetc MAC. Fixes: b32e9a75 ("arm: dts: ls1028a updates for network interfaces") Signed-off-by:
Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by:
Ramon Fried <rfried.dev@gmail.com>
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Due to an upstream change, the ls1028a.dtsi bindings for the mscc_felix switch got accepted with all ports disabled by default and with no link to the DSA master - this needs to be done on a per board basis. Note that enetc-2 is not currently disabled in the ls1028a.dtsi, but presumably at some point it might become. Explicitly enable it in the QDS device trees anyway, to proactively avoid issues when that happens. Fixes: a7fdac7e ("arm: dts: ls1028a: define QDS networking protocol combinations") Signed-off-by:
Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by:
Ramon Fried <rfried.dev@gmail.com>
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- Jun 28, 2021
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Piyush Mehta authored
This patch adds psgtr clocks and phy entry for USB0, USB1 and SATA node for zc1751-xm017-dc3 board. Signed-off-by:
Piyush Mehta <piyush.mehta@xilinx.com> Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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- Jun 24, 2021
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Hai Pham authored
Add board code for the R8A779A0 V3U Falcon board. Signed-off-by:
Hai Pham <hai.pham.ud@renesas.com> Signed-off-by:
Marek Vasut <marek.vasut+renesas@gmail.com> -- Marek: - various small rebase fixes and clean ups
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Marek Vasut authored
The R-Car V3U does support RPC interface, however the support for it is missing in upstream Linux DTs as of commit 9f4ad9e425a1 ("Linux 5.12"), add the node into u-boot.dtsi to let U-Boot access the SPI NOR or HF. Signed-off-by:
Marek Vasut <marek.vasut+renesas@gmail.com>
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Hai Pham authored
Add R8A779A0 V3U DT extras for U-Boot. Based on "ARM: dts: renesas: Add R8A779A0 V3U DTs" by Hai Pham <hai.pham.ud@renesas.com> Signed-off-by:
Marek Vasut <marek.vasut+renesas@gmail.com>
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Marek Vasut authored
Import R8A779A0 V3U Falcon DTs from Linux 5.12, commit 9f4ad9e425a1 ("Linux 5.12") . Signed-off-by:
Marek Vasut <marek.vasut+renesas@gmail.com>
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Marek Vasut authored
Import R8A779A0 V3U DTs and headers from Linux 5.12, commit 9f4ad9e425a1 ("Linux 5.12") . Signed-off-by:
Marek Vasut <marek.vasut+renesas@gmail.com>
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- Jun 23, 2021
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Michal Simek authored
DT files have been added this year but forgot to update it that's why do it in separate patch now. Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
Wire psgtr for zc1751 dc1 board. Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
It is not recommended to have aliases for gpio. In past it was used in Linux for assigning numbers via sysfs which is deprecated and libgpiod should be used instead. In U-Boot this number is used for seq number but gpio offset are not counted from this number. That's why having these aliases only for seq number is not needed. As is done in Linux it is the best to use full gpio name instead of sequence number which depends on sequence in binding. Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
Both boards are usb3.0 capable. dc3 was also missing enabling dwc3* nodes. Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
Align USB nodes with the latest dt-bindings. It is adding resets, new interrupt and also some quirks. Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
dtc supports new sugar syntax which is easier compare to previous one that's why also covert overlays for SOM to it. Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
kv260-revB is different compare to revA (usbhub is wired via i2c) that's why remove revA compatible string. Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
psgtr node should be below pinctrl for easier comparion among dts files. That's why move that nodes to different location. Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
Clock setting is not static anymore that's why it depends on firmware setup that's why remove this comment. Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
Linux kernel is not using these properties that's why they can be removed. Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
Networking subsystem is not using aliases that's why remove them for CAN devices. There is also no any other Xilinx ZynqMP DT file with them. Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
There are no drivers for these devices that's why remove that nodes completely. This change is done based on Linux kernel. Signed-off-by:
Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/20210308115437.2232847-1-quanyang.wang@windriver.com
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Michal Simek authored
Convert all boards to use nvmem alias instead of xlnx,eeprom. The change is done based on discussion in the link below. Link: https://lore.kernel.org/r/CAL_JsqLMDqpkyg-Q7mUfw-XH67-v068Q6e9wTq2UOoN=0-_coQ@mail.gmail.com Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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Srinivas Neeli authored
As per the design specification "The 16-bit Seconds Calibration Value represents the number of Oscillator Ticks that are required to measure the largest time period that is less than or equal to 1 second. For an oscillator that is 32.768 KHz, this value will be 0x7FFF." Signed-off-by:
Srinivas Neeli <srinivas.neeli@xilinx.com> Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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