- Aug 11, 2020
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Add wkup_gpio0 node required for detecting whether board mux is set HyperFlash. Signed-off-by:Vignesh Raghavendra <vigneshr@ti.com>
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On J7200 SoC OSPI0 and HypeFlash are muxed at HW level and only one of them can be used at any time. J7200 EVM has both HyperFlash and OSPI flash on board. There is a user switch (SW3.1) that can be toggled to select OSPI flash vs HyperFlash. Read the state of this switch via wkup_gpio0_6 line and fixup the DT nodes to select OSPI0 vs HyperFlash Signed-off-by: -
Add USB related DT entries to enable USB device mode. Signed-off-by: -
Lokesh Vutla authoredAdd initial A72 defconfig support. Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com> -
Lokesh Vutla authored
Add initial R5 defconfig support Signed-off-by:Lokesh Vutla <lokeshvutla@ti.com> -
Add the basic a72 basic dts for j7200. Following nodes were supported: - UART - MMC SD - I2C - TISCI communication - LPDDR with 1600MTs configuration. Signed-off-by:
Andrew F. Davis <afd@ti.com> Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
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Lokesh Vutla authored
Add the basic a72 dts for j7200. Following nodes were supported: - UART - MMC SD - I2C - TISCI communication Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Vishal Mahaveer <vishalm@ti.com> Signed-off-by:
Faiz Abbas <faiz_abbas@ti.com>
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Add device identification for J7200 SoC Signed-off-by:
Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
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Lokesh Vutla authored
k3-j721e ddr driver sanity checks for product id and version number. Version number gets changed for every minor update in the IP. So discard the version check and just sanity check for product id. Signed-off-by:Lokesh Vutla <lokeshvutla@ti.com> -
Lokesh Vutla authored
Add board detection support for j7200 common processor board. Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: -
Lokesh Vutla authored
j7200-evm has minor differences with j721e-evm based on the IPs available in the SoC. Introduce separate build targets for j7200-evm to incorporate the differences. Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: -
Lokesh Vutla authored
Detect if sysfw is already loaded by ROM and pass this information to sysfw loader. Based on this information sysfw loader either loads the sysfw image from boot media or just receives the boot notification message form sysfw. Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: -
Lokesh Vutla authored
Starting J7200 SoC, ROM supports for loading sysfw directly from boot image. ROM passes this information on number of images that are loaded to bootloader at certain location. Add support for storing this information before it gets corrupted. Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: -
Lokesh Vutla authored
The J7200 SoC is a part of the K3 Multicore SoC architecture platform. It is targeted for automotive gateway, vehicle compute systems, Vehicle-to-Vehicle (V2V) and Vehicle-to-Everything (V2X) applications. The SoC aims to meet the complex processing needs of modern embedded products. Some highlights of this SoC are: * Dual Cortex-A72s in a single cluster, two clusters of lockstep capable dual Cortex-R5F MCUs and a Centralized Device Management and Security Controller (DMSC). * Configurable L3 Cache and IO-coherent architecture with high data throughput capable distributed DMA architecture under NAVSS. * Integrated Ethernet switch supporting up to a total of 4 external ports in addition to legacy Ethernet switch of up to 2 ports. * Upto 1 PCIe-GEN3 controller, 1 USB3.0 Dual-role device subsystems, 20 MCANs, 3 McASP, eMMC and SD, OSPI/HyperBus memory controller, I3C and I2C, eCAP/eQEP, eHRPWM among other peripherals. * One hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL management. See J7200 Technical Reference Manual (SPRUIU1, June 2020) for further details: https://www.ti.com/lit/pdf/spruiu1 Add support for detection J7200 SoC Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: -
Lokesh Vutla authored
In main control mmr there is no partition 4 and partition 6 is available only on J721e. Fix the same in ctrl_mmr_unlock function Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: -
Lokesh Vutla authored
Add an api soc_is_j721e(), and use it to enable certain functionality that is available only on j721e. This detection is needed when DT is not available. Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: -
Lokesh Vutla authored
Starting J7200 SoC, ROM supports for loading sysfw directly from boot image. In such cases, SPL need not load sysfw from boot media, but need to receive boot notification message from sysfw. So separate out remoteproc calls for system controller from sysfw loader and just receive the boot notification if sysfw is already loaded. Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: -
Lokesh Vutla authored
mmr_unlock api is common for all k3 devices. Move it to a common location. Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: -
If SPL_MULTI_DTB_FIT is not enabled, then CONFIG_SPL_OF_LIST is not defined And in turn tispl.bin ends up not embedding any DTB. Fixing it by using CONFIG_DEFAULT_DEVICE_TREE if SPL_OF_LIST is empty. Signed-off-by:
Jean-Jacques Hiblot <jjhiblot@ti.com> Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com> -
The DT nodes on J721E SoCs currently use a node name "interconnect" for the various interconnects. This name is not following the DT schema, and should simply be "bus". Update the fdt fixup logic to use both the current and the expected corrected path names so that this logic won't be broken with newer kernels. Signed-off-by: -
Lokesh Vutla authored
Guard all eeprom probe with TI_I2C_BOARD_DETECT to avoid reading eeprom when eeprom is not available Reviewed-by:
Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: -
Lokesh Vutla authored
Current usage of eeprom apis produce a build failure when CONFIG_TI_I2C_BOARD_DETECT is not defined. Add stub function for these apis to avoid build failures. Reviewed-by:
Lokesh Vutla <lokeshvutla@ti.com> -
Because of space constraints, create a new USB defconfig for R5 to faciliate booting from USB mass storage devices Signed-off-by: -
Because of space constraints, create a new USB defconfig for R5 to faciliate booting in USB peripheral (DFU) bootmode Signed-off-by: -
Enable configs to facilitate booting from USB Mass Storage devices as well as USB peripheral boot Signed-off-by: -
Add offset and environment related configs used for booting from DFU. Signed-off-by: -
Add nodes for USB0 in SPL to enable USB host boot mode Signed-off-by: -
Add USB0 nodes and set them to host mode to support USB host and peripheral boot modes Signed-off-by: -
Add support for identifying USB host and device boot modes Signed-off-by: -
U-boot only supports either USB host or device mode for a node at a time in dts. To support both host and dfu bootmodes, set "peripheral" as the default dr_mode but fixup property to "host" if host bootmode is detected. This needs to happen before the dwc3 generic layer binds the usb device to a host or device driver. Therefore, add an fdtdec_setup_board() implementation to fixup the dt based on the boot mode. Also use the same fixup function to set the USB-PCIe Serdes mux to PCIe in both the host and device cases. This is required for accessing the interface at USB 2.0 speeds. Signed-off-by: -
Gate mmc related system related configurations with DM_MMC to avoid build errors when MMC is not enabled Signed-off-by: -
Add support for loading system firmware from a USB mass storage device Signed-off-by: -
In order to be able to use things like file system drivers early on in SPL (before relocation) in a memory-constrained environment when DDR is not yet available we cannot use the simple malloc scheme which does not implement the freeing of previously allocated memory blocks. To address this issue go ahead and enable the use of the full malloc by manually initializing the required functionality inside board_init_f by creating a full malloc pool inside the pre-relocation malloc pool. Signed-off-by: -
usb_init() may be called multiple times for fetching multiple images from SPL. Skip reinitializing USB if its already been done Signed-off-by: -
Create a new API spl_usb_load() that takes the filename as a parameter instead of taking the default U-boot PAYLOAD_NAME Signed-off-by: -
The DT nodes on AM65x SoCs currently use a node name "interconnect" for the various interconnects. This name is not following the DT schema, and should simply be "bus". Update the fdt fixup logic to use both the current and the expected corrected path names so that this logic won't be broken with newer kernels. The logic also corrects the crypto node name as the DT node unit-addresses are all expected to be lower case. Signed-off-by: -
The hardcoded array size leads to array overflows with changes in speed modes enum in mmc core. Use MMC_MODES_END for otap_del_sel array declaration to fix this. Signed-off-by:
Peng Fan <peng.fan@nxp.com>
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The various CBASS interconnect nodes on K3 J721E SoCs are defined using the node name "interconnect". This is not a valid node name as per the dt-schema. Fix these node names to use the standard name used for SoC interconnects, "bus". Signed-off-by: -
The various CBASS interconnect nodes on K3 AM65x SoCs are defined using the node name "interconnect". This is not a valid node name as per the dt-schema. Fix these node names to use the standard name used for SoC interconnects, "bus". Signed-off-by: -
This commit completes the migrations for DM_ETH and DM_USB. The board is now consistent with omap3_beagle and other remaining OMAP3 boards. Cc: Tom Rini <trini@konsulko.com> Cc: Adam Ford <aford173@gmail.com> Signed-off-by:Derald D. Woods <woods.technical@gmail.com>
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