- May 06, 2021
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The AM642 SoC belongs to the K3 Multicore SoC architecture platform, providing advanced system integration to enable applications such as Motor Drives, PLC, Remote IO and IoT Gateways. Some highlights of this SoC are: * Dual Cortex-A53s in a single cluster, two clusters of dual Cortex-R5F MCUs, and a single Cortex-M4F. * Two Gigabit Industrial Communication Subsystems (ICSSG). * Integrated Ethernet switch supporting up to a total of two external ports. * PCIe-GEN2x1L, USB3/USB2, 2xCAN-FD, eMMC and SD, UFS, OSPI memory controller, QSPI, I2C, eCAP/eQEP, ePWM, ADC, among other peripherals. * Centralized System Controller for Security, Power, and Resource Management (DMSC). See AM64X Technical Reference Manual (SPRUIM2, Nov 2020) for further details: https://www.ti.com/lit/pdf/spruim2 Introduce basic support for the AM642 SoC to enable SD/MMC boot. Introduce a limited set of MAIN domain peripherals under cbass_main and a set of MCU domain peripherals under cbass_mcu. Signed-off-by:
Dave Gerlach <d-gerlach@ti.com>
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Add pinctrl macros for AM64 SoC. These macro definitions are similar to that of previous platforms, but adding new definitions to avoid any naming confusions in the soc dts files. Signed-off-by:
Dave Gerlach <d-gerlach@ti.com>
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Add board specific initialization for am64x based boards. Signed-off-by:
Dave Gerlach <d-gerlach@ti.com>
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AM64x uses a different thread mapping that existing K3 SoCs, so update the valid thread ID list to include those used for AM64x. Also remove the comment identifying the purpose of each thread ID. The purpose of the thread ID is specified when describing the threads in the device tree and the same ID can mean different things on different SoCs, so the comment is not useful. Signed-off-by:
Dave Gerlach <d-gerlach@ti.com>
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Add support for the controller present on the AM642 SoC. There are instances: sdhci0: 8bit bus width, max 400 MBps sdhci1: 4bit bus width, max 100 MBps Signed-off-by:
Dave Gerlach <d-gerlach@ti.com>
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Change the memory attributes for the DDR regions used by the remote processors on AM65x so that the cores can see and execute the proper code. A separate table based on the previous K3 SoCs is introduced since the number of remote processors and their DDR usage is different between the SoC families. Signed-off-by:
Keerthy <j-keerthy@ti.com> Signed-off-by:
Dave Gerlach <d-gerlach@ti.com>
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The AM642 SoCs use the Main R5FSS0 as a boot processor, and runs the R5 SPL that performs the initialization of the System Controller processor and starting the Arm Trusted Firmware (ATF) on the Arm Cortex A53 cluster. The Core0 serves as this boot processor and is parked in WFE after all the initialization. Core1 does not directly participate in the boot flow, and is simply parked in a WFI. Power down these R5 cores (and the associated RTI timer resources that were indirectly powered up) after starting up ATF on A53 by using the appropriate SYSFW API in release_resources_for_core_shutdown(). This allows these Main R5F cores to be further controlled from the A53 to run regular applications. Signed-off-by:
Suman Anna <s-anna@ti.com> Signed-off-by:
Dave Gerlach <d-gerlach@ti.com>
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To avoid any glitches on MMC clock line, make use of pm per and post callbacks when loading sysfw. Signed-off-by:
Dave Gerlach <d-gerlach@ti.com>
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Use the System Firmware (SYSFW) loader framework to load and start the SYSFW as part of the AM642 early initialization sequence. Also make use of existing logic to detect if ROM has already loaded sysfw and avoided attempting to reload and instead just prepare to use already running firmware. While at it also initialize the MAIN_UART1 pinmux as it is used by SYSFW to print diagnostic messages. Signed-off-by:
Dave Gerlach <d-gerlach@ti.com>
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For AM642, ROM supports loading system firmware directly from boot image. ROM passes information about the number of images that are loaded to bootloader at a specific address that is temporary. Add support for storing this information somewhere permanent before it gets corrupted. Signed-off-by:
Dave Gerlach <d-gerlach@ti.com>
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To access various control MMR functionality the registers need to be unlocked. Do that for all control MMR regions in the MAIN domain. Signed-off-by:
Dave Gerlach <d-gerlach@ti.com>
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AM642 allows for booting from primary or backup boot media. Both media can be chosen individually based on switch settings. ROM looks for a valid image in primary boot media, if not found then looks in backup boot media. In order to pass this boot media information to boot loader, ROM stores a value at a particular address. Add support for reading this information and determining the boot media correctly. Signed-off-by:
Keerthy <j-keerthy@ti.com> Signed-off-by:
Dave Gerlach <d-gerlach@ti.com>
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The AM642 SoC belongs to the K3 Multicore SoC architecture platform, providing advanced system integration to enable applications such as Motor Drives, PLC, Remote IO and IoT Gateways. Some highlights of this SoC are: * Dual Cortex-A53s in a single cluster, two clusters of dual Cortex-R5F MCUs, and a single Cortex-M4F. * Two Gigabit Industrial Communication Subsystems (ICSSG). * Integrated Ethernet switch supporting up to a total of two external ports. * PCIe-GEN2x1L, USB3/USB2, 2xCAN-FD, eMMC and SD, UFS, OSPI memory controller, QSPI, I2C, eCAP/eQEP, ePWM, ADC, among other peripherals. * Centralized System Controller for Security, Power, and Resource Management (DMSC). See AM64X Technical Reference Manual (SPRUIM2, Nov 2020) for further details: https://www.ti.com/lit/pdf/spruim2 Signed-off-by:
Dave Gerlach <d-gerlach@ti.com>
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This reverts commit d64b9cdc. As pointed by [1] and [2], the reverted patch made every DT 'reg' property translatable. What the patch was trying to fix was fixed in a different way from previously submitted patches which instead of correcting the generic address translation function fixed the issue with appropriate platform code. [1] https://patchwork.ozlabs.org/project/uboot/patch/1614324949-61314-1-git-send-email-bmeng.cn@gmail.com/ [2] https://lore.kernel.org/linux-clk/20210402192054.7934-1-dariobin@libero.it/T/ Signed-off-by:
Dario Binacchi <dariobin@libero.it> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com>
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Using the custom TI functions required not only replacing common memory access functions but also rewriting the routines used to set bypass and lock states. As for readl() and writel(), they also required the address of the register to be accessed, a parameter that is hidden by the TI clk module. Signed-off-by:
Dario Binacchi <dariobin@libero.it>
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Replaces the common memory access functions used by the driver with the ones exported from the TI clk module. Signed-off-by:
Dario Binacchi <dariobin@libero.it>
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The clock access functions exported by the clk header use the struct clk_ti_reg parameter to get the address of the register. This must also apply to clk_ti_latch(). Changes to TI's clk-mux and clk-divider drivers prevented the patch from generating compile errors. Signed-off-by:
Dario Binacchi <dariobin@libero.it>
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As pointed by [1] and [2], commit d64b9cdc ("fdt: translate address if #size-cells = <0>") is wrong: - It makes every 'reg' DT property translatable. It changes the address translation so that for an I2C 'reg' address you'll get back as reg the I2C controller address + reg value. - The quirk must be fixed with platform code. The clk_ti_get_reg_addr() is the platform code able to make the correct address translation for the AM33xx clocks registers. Its implementation was inspired by the Linux Kernel code. [1] https://patchwork.ozlabs.org/project/uboot/patch/1614324949-61314-1-git-send-email-bmeng.cn@gmail.com/ [2] https://lore.kernel.org/linux-clk/20210402192054.7934-1-dariobin@libero.it/T/ Signed-off-by:
Dario Binacchi <dariobin@libero.it>
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- Apr 30, 2021
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https://source.denx.de/u-boot/custodians/u-boot-dmTom Rini authored
buildman environment fix binman FMAP improvements minor test improvements and fixes minor dm improvements
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- Apr 29, 2021
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https://source.denx.de/u-boot/custodians/u-boot-microblazeTom Rini authored
Xilinx changes for v2021.07-rc2 xilinx: - Enable saving variables based on bootmode - Cleanup usb dfu setup and wire it up with usb bootmode - Fix bootscript address logic - Remove GD references (spi, Versal) - Enable capsule update clk: - Small Kconfig fix net: - Fix gmii2rgmii bridge binding usb: - Propagate error (dfu gadget)
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Michal Simek authored
gd is not used in this file that's why doesn't make sense to declare it. Signed-off-by:
Michal Simek <michal.simek@xilinx.com>
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https://source.denx.de/u-boot/custodians/u-boot-cfi-flashTom Rini authored
- mtd: cfi: Fix PPB lock status readout (Marek)
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https://source.denx.de/u-boot/custodians/u-boot-marvellTom Rini authored
- Add base support for Marvell OcteonTX2 CN9130 CRB (mostly done by Kostya) - Sync Armada 3k/7k/8k SERDES code with Marvell version (misc Marvell authors) - pci-aardvark: Fix processing PIO transfers (Pali)
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Add a reference for the TPM event types and provide missing constants. Signed-off-by:
Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by:
Ilias Apalodimas <ilias.apalodimas@linaro.org>
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Add test item for getting address and size functions Test the following function: - ofnode_get_addr() - ofnode_get_size() Signed-off-by:
Chen Guanqiao <chenguanqiao@kuaishou.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Add functions to add size of addresses in the device tree using ofnode references. If the size is not set, return FDT_SIZE_T_NONE. Signed-off-by:
Chen Guanqiao <chenguanqiao@kuaishou.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Simon Glass authored
At present we sometimes see problems in gitlab where the environment has 0x80 characters or sequences which are not valid UTF-8. Avoid this by using bytes for the environment, both internal to buildman and when writing out the 'env' file. Add a test to make sure this works as expected. Reported-by:
Marek Vasut <marex@denx.de> Fixes: e5fc79ea ("buildman: Write the environment out to an 'env' file") Signed-off-by:
Simon Glass <sjg@chromium.org>
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Simon Glass authored
There have been at least a few cases where an exception has occurred in a thread and resulted in buildman hanging: running out of disk space and getting a unicode error. Handle these by collecting a list of exceptions, printing them out and reporting failure if any are found. Add a test for this. Signed-off-by:
Simon Glass <sjg@chromium.org>
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Simon Glass authored
At present the code to report a build result is duplicated. Put it in a common function to avoid this. Signed-off-by:
Simon Glass <sjg@chromium.org>
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Simon Glass authored
Add some function comments which are missing, or missing arguments. Signed-off-by:
Simon Glass <sjg@chromium.org>
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If there are no nodes or if all nodes are disabled, this function would return err without setting it first. Fix this by initializing err to zero. Fixes: 94f7afdf ("dm: core: Ignore disabled devices when binding") Signed-off-by:
Sean Anderson <sean.anderson@seco.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Today of_address_to_resource() is called only in ofnode_read_resource() for livetree support and fdt_get_resource() is called when livetree is not supported. The fdt_get_resource() doesn't do the address translation so when it is required, but the address translation is done by ofnode_read_resource() caller, for example in drivers/firmware/scmi/smt.c::scmi_dt_get_smt_buffer() { ... ret = ofnode_read_resource(args.node, 0, &resource); if (ret) return ret; faddr = cpu_to_fdt32(resource.start); paddr = ofnode_translate_address(args.node, &faddr); ... The both behavior should be aligned and the address translation must be called in fdt_get_resource() and removed for each caller. Fixes: a4481012 ("dm: core: Add dev_read_resource() to read device resources") Signed-off-by:
Patrick Delaunay <patrick.delaunay@foss.st.com> Acked-by:
Etienne Carriere <etienne.carriere@linaro.org>
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Simon Glass authored
When used with hierarchical images, use the Chromium OS convention of adding a section before all the subentries it contains. Signed-off-by:
Simon Glass <sjg@chromium.org>
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Simon Glass authored
Use an interator in two of the fmap tests so it is easier to add new items. Also check the name first since that is the first indication that something is wrong. Use a variable for the expected size of the fmap to avoid repeating the code. Signed-off-by:
Simon Glass <sjg@chromium.org>
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Parse each empty-line-delimited message separately. This saves having to deal with all the different line content styles, we only care about the header ERROR | WARNING | NOTE... Also make checkpatch print line information for a uboot specific warning. Signed-off-by:
Evan Benn <evanbenn@chromium.org> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Given that we have tests that require pygit2 and it can be installed like any other python module, fail much more loudly if it is missing. Cc: Simon Glass <sjg@chromium.org> Signed-off-by:
Tom Rini <trini@konsulko.com>
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The patman tests require the requests module, add it. Cc: Simon Glass <sjg@chromium.org> Signed-off-by:
Tom Rini <trini@konsulko.com>
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Given that test/py/requirements.txt has all required test modules, make use of that rather than a manual pip install list before running our assorted tool testsuites. Signed-off-by:
Tom Rini <trini@konsulko.com> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com>
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It is easier to read the positive conditional. While at it, convert hard coded length of "_test_" to strlen("_test_") which will be converted to a constant bu optimizing compiler. Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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When run `ut dm [test name]` allow to use simple pattern to run all tests started with given prefix. For example, to run all ACPI test cases: ut dm acpi* Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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